From: Michael Trimarchi
Upstream linux commit 7f501f0a72036d.
Store the NAND ID in struct nand_chip to avoid passing id_data and id_len
as function parameters.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v3)
Changes in v3:
- Use commit sha1 with 13
From: Michael Trimarchi
In preparation of moving specific nand support that are not jedec
or onfi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/mtd/nand/raw/nand_base.c | 3 ++-
include/linux/mtd/rawnand.h | 3 +++
2 files changed, 5
*'
+ 33 |int *maf_id, int *dev_id,
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v4:
- Add the patch to the series.
drivers/mtd/nand/raw/mt7621_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Michael Trimarchi
chip points to mtd. Passing chip is enough to have a reference
to mtd when is necessary
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v3)
Changes in v3:
- Fix code style warnings raised by patman.
drivers/mtd/nand/raw
step will allow us to get
rid of full-id entries in the nand_ids table or all the vendor specific
cases added over the time in the generic NAND ID decoding logic.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v3)
Changes in v3:
- Use commit sha1 with 13
let detection code directly set the NAND_BUSWIDTH_16 flag in
chip->options if needed.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v3)
Changes in v3:
- Use commit sha1 with 13 digits.
Changes in v2:
- Use short-commit form.
- Remove linux info. Uboot
In preparation of re-sync of mtd stack, we opt to move the current stack
slowly in order to have a more easy sync and test. We would like to
prepare uboot to support no-jedec and no-onfi compliant nand so we need
to clean up a bit the code we have now and upstream some of the support.
In this
Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v3:
- Use commit sha1 with 13 digits.
- Wrap commit description to a maximum of 75 chars.
Changes in v2:
- Use short-commit form.
- Remove linux info. Uboot seems that backport without add this
extra information.
drivers/mtd/nand/raw
-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v3:
- Use commit sha1 with 13 digits.
Changes in v2:
- Use short-commit form
- Remove linux info. Uboot seems that backport without add this
extra information.
drivers/mtd/nand/raw/nand_toshiba.c | 26 ++
1
From: Michael Trimarchi
Upstream linux commit 3b5206f4be9b65.
Move Macronix specific initialization logic into nand_macronix.c. This
is part of the "separate vendor specific code from core" cleanup
process.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Cha
From: Michael Trimarchi
Upstream linux commit 229204da53b31d.
Move AMD/Spansion specific initialization/detection logic into
nand_amd.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
--
From: Michael Trimarchi
Upstream linux commit 10d4e75c36f6c1.
Move Micron specific initialization logic into nand_micron.c. This is
part of the "separate vendor specific code from core" cleanup process.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in
From: Michael Trimarchi
Upstream linux commit 9b2d61f80b060c.
Move Toshiba specific initialization and detection logic into
nand_toshiba.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dari
From: Michael Trimarchi
Upstream linux commit c51d0ac59f2420.
Move Samsung specific initialization and detection logic into
nand_samsung.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dari
From: Michael Trimarchi
Upstream linux commit 01389b6bd2f4f7.
Move Hynix specific initialization and detection logic into
nand_hynix.c. This is part of the "separate vendor specific code from
core" cleanup process.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
--
From: Michael Trimarchi
In preparation of moving specific nand support that are not jedec
or onfi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/mtd/nand/raw/nand_base.c | 3 ++-
include/linux/mtd/rawnand.h | 3 +++
2 files changed, 5
From: Michael Trimarchi
chip points to mtd. Passing chip is enough to have a reference
to mtd when is necessary
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v3:
- Fix code style warnings raised by patman.
drivers/mtd/nand/raw/nand_base.c | 25
From: Michael Trimarchi
Upstream linux commit 7f501f0a72036d.
Store the NAND ID in struct nand_chip to avoid passing id_data and id_len
as function parameters.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v3:
- Use commit sha1 with 13 digits.
- Fix code
step will allow us to get
rid of full-id entries in the nand_ids table or all the vendor specific
cases added over the time in the generic NAND ID decoding logic.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v3:
- Use commit sha1 with 13 digits.
- Fix code style
let detection code directly set the NAND_BUSWIDTH_16 flag in
chip->options if needed.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v3:
- Use commit sha1 with 13 digits.
Changes in v2:
- Use short-commit form.
- Remove linux info. Uboot seems that backport witho
In preparation of re-sync of mtd stack, we opt to move the current stack
slowly in order to have a more easy sync and test. We would like to
prepare uboot to support no-jedec and no-onfi compliant nand so we need
to clean up a bit the code we have now and upstream some of the support.
In this
let detection code directly set the NAND_BUSWIDTH_16 flag in
chip->options if needed.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v3:
- Use commit sha1 with 13 digits.
Changes in v2:
- Use short-commit form.
- Remove linux info. Uboot seems that backport witho
Passing the mtdparts environment variable to the Linux kernel is
required to properly mount the UBI rootfs.
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
include/configs/imx8mn_bsh_smm_s2.h | 1 +
1 file changed, 1 insertion(+)
diff
The Linux kernel device tree already specifies the device to be used for
boot console output with a stdout-path property under /chosen.
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
include/configs/imx8mn_bsh_smm_s2.h | 2 +-
1 file
imx8mn_bsh_smm_s2 uses ubifs rootfs, UBI commands are required to flash
it.
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
configs/imx8mn_bsh_smm_s2_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs
It allows to boot from NAND.
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
configs/imx8mn_bsh_smm_s2_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/imx8mn_bsh_smm_s2_defconfig
b/configs
The series contains all the patches required by the BSH smm s2 board for
booting from NAND and properly mounting the UBI rootfs.
Dario Binacchi (4):
configs: imx8mn_bsh_smm_s2: add NAND driver
configs: imx8mn_bsh_smm_s2: add UBI commands
configs: imx8mn_bsh_smm_s2: remove console from
Passing the mtdparts environment variable to the Linux kernel is
required to properly mount the UBI rootfs.
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
include/configs/imx8mn_bsh_smm_s2.h | 1 +
1 file changed, 1 insertion(+)
diff
It allows to boot from NAND.
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
configs/imx8mn_bsh_smm_s2_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/imx8mn_bsh_smm_s2_defconfig
b/configs
The Linux kernel device tree already specifies the device to be used for
boot console output with a stdout-path property under /chosen.
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
include/configs/imx8mn_bsh_smm_s2.h | 2 +-
1 file
imx8mn_bsh_smm_s2 uses ubifs rootfs, UBI commands are required to flash
it.
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
configs/imx8mn_bsh_smm_s2_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs
The series contains all the patches required by the BSH smm s2 board for
booting from NAND and properly mounting the UBI rootfs.
Dario Binacchi (4):
configs: imx8mn_bsh_smm_s2: add NAND driver
configs: imx8mn_bsh_smm_s2: add UBI commands
configs: imx8mn_bsh_smm_s2: remove console from
Hi Sean,
> Il 01/04/2022 23:43 Michael Nazzareno Trimarchi
> ha scritto:
>
>
> Hi Sean
>
> On Fri, Apr 1, 2022 at 8:53 PM Sean Anderson wrote:
> >
> >
> >
> > On 4/1/22 2:46 PM, Sean Anderson wrote:
> > > Hi all,
> > >
> > > I don't understand how spl_nand_fit_read is supposed to work.
rd compatible the update of REFTOP_VBGADJ
from fuse. Your patch, re-introduces non-backward compatibility.
Thanks and regards,
Dario
> Anyway, both NXP manufacturing and SW need to follow the fuse value
> definition.
>
> Best regards,
> Ye Li
> >
> > Michael
> >
> > >
>
Commit 97c16dc8bf098 ("imx: mx6ull: update the REFTOP_VBGADJ setting")
made this macro unused. Then remove it.
Signed-off-by: Dario Binacchi
---
arch/arm/include/asm/arch-mx6/crm_regs.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h
Signed-off-by: Dario Binacchi
---
arch/arm/mach-imx/mx6/soc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index aacfc854a2f8..099cb5b12d77 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
Commit 97c16dc8bf098 ("imx: mx6ull: update the REFTOP_VBGADJ setting")
made this macro unused. Then remove it.
Signed-off-by: Dario Binacchi
---
arch/arm/include/asm/arch-mx6/crm_regs.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h
Signed-off-by: Dario Binacchi
---
arch/arm/mach-imx/mx6/soc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index aacfc854a2f8..099cb5b12d77 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
Hi Guillaume,
> Il 22/10/2021 14:34 Guillaume GARDET ha scritto:
>
>
> Hi Dario,
>
> ----- Dario Binacchi a écrit :
> > Hi Guillaume,
> >
> > > Il 21/10/2021 16:47 Guillaume GARDET ha
> > > scritto:
> > >
> > >
> &
Hi Guillaume,
> Il 21/10/2021 16:47 Guillaume GARDET ha scritto:
>
>
> Hi,
>
> Commit 76c2ff3e [0] broke backlight on Chromebook snow.
> A revert on top of 2021.10 restores the backlight.
> Not sure why it breaks on Chromebook snow yet. Dario, any idea how to fix
> this?
Is it possible
SSC.
Link: https://lore.kernel.org/r/20210606202253.31649-6-dario...@libero.it
Signed-off-by: Dario Binacchi
---
arch/arm/include/asm/arch-am33xx/clock.h | 12 +++
drivers/clk/ti/clk-am3-dpll.c| 131 ++-
2 files changed, 140 insertions(+), 3 deletions(-)
diff --git
in the PRCM_CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE,
MPU, DDR, PER, DISP, EXTDEV).
Link: https://lore.kernel.org/r/20210606202253.31649-5-dario...@libero.it
Signed-off-by: Dario Binacchi
---
arch/arm/dts/am43xx-clocks.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git
are mapped for all PLLs (CORE, MPU, DDR,
PER, DISP).
Link: https://lore.kernel.org/r/20210606202253.31649-4-dario...@libero.it
Signed-off-by: Dario Binacchi
---
arch/arm/dts/am33xx-clocks.dtsi | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/am33xx
d spread spectrum support")
Dario Binacchi (3):
ARM: dts: am33xx-clocks: add spread spectrum support
ARM: dts: am43xx-clocks: add spread spectrum support
clk: ti: add am33xx/am43xx spread spectrum clock support
arch/arm/dts/am33xx-clocks.dtsi | 10 +-
arch/arm/dts/am4
82e5eb3b43..21e5234477 100644
--- a/drivers/rtc/davinci.c
+++ b/drivers/rtc/davinci.c
@@ -2,127 +2,433 @@
/*
* (C) Copyright 2011 DENX Software Engineering GmbH
* Heiko Schocher
+ * Copyright (C) 2021 Dario Binacchi
*/
#include
#include
+#include
+#include
#include
#include
On reset, the RTC loads the 2000-01-01 date with a wrong day of the
week (Sunday instead of Saturday).
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/rtc/davinci.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c
To write correct data to the TC registers, the STATUS register must be
read until the BUSY bit is equal to zero. Once the BUSY flag is zero,
there is a 15 μs access period in which the TC registers can be
programmed.
The rtc_wait_not_busy() has been inspired by the Kernel.
Signed-off-by: Dario
The RTC module contains a kicker mechanism to prevent any spurious
writes from changing the register values. To set the time, you must
first unlock the TC registers, update them and then lock.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/rtc/davinci.c | 14 ++
1
Use 32-bit access only where it is needed. Most of the RTC registers
contain useful information in the 8 least significant bits, the others
are reserved.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/rtc/davinci.c | 32
1 file changed, 16
There have been some changes to the am335x- DTs related to the
rtc node, so let's re-syncs them with Linux.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
arch/arm/dts/am335x-bone-common.dtsi| 5 +
arch/arm/dts/am335x-evm.dts | 5 +
arch/arm/dts/am335x
The series adds driver model support for omap RTC plus some fixes.
Changes in v2:
- Separated from Kconfig patch
- Use consistent naming (omap_rtc_.
- Remove non-DM support. It's no more used.
Dario Binacchi (8):
rtc: davinci: enable compilation for omap architectures
rtc: davinci: fix
The Davinci's onchip RTC is also present on TI OMAP1, AM33XX, AM43XX and
DRA7XX SOCs. So, let's enable compilation for these architectures too.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/rtc/Kconfig | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/rtc
Fix errors raised by module compilation.
Signed-off-by: Dario Binacchi
---
Changes in v2:
- Separated from Kconfig patch
drivers/rtc/davinci.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c
index c446e7a735
Hi Lokesh,
> Il 27/05/2021 11:59 Lokesh Vutla ha scritto:
>
>
> On 07/05/21 9:45 am, Dario Binacchi wrote:
> > The Davinci's onchip RTC is also present on TI OMAP1, AM33XX, AM43XX and
> > DRA7XX SOCs. So, let's enable compilation for these architectures too.
>
Hi,
> Il 17/05/2021 22:15 Tom Rini ha scritto:
>
>
> On Fri, May 07, 2021 at 02:40:34PM +0530, Vignesh Raghavendra wrote:
>
> > If reg property of pinctrl-single node requires address translation then
> > probe fails with following message:
> >
> > single-pinctrl pinctrl@4301c000: failed to
Hi Pali,
> Il 07/05/2021 09:56 Pali Rohár ha scritto:
>
>
> On Friday 07 May 2021 06:15:02 Dario Binacchi wrote:
> > The Davinci's onchip RTC is also present on TI OMAP1, AM33XX, AM43XX and
> > DRA7XX SOCs. So, let's enable compilation for these archi
Update the driver to support the device tree and the driver model.
The read / write helpers in rtc_ops allow access to scratch registers
only. The offset parameter is added to the address of the scratch0
register.
Signed-off-by: Dario Binacchi
---
drivers/rtc/davinci.c | 373
There have been some changes to the am335x- DTs related to the
rtc node, so let's re-syncs them with Linux.
Signed-off-by: Dario Binacchi
---
arch/arm/dts/am335x-bone-common.dtsi| 5 +
arch/arm/dts/am335x-evm.dts | 5 +
arch/arm/dts/am335x-evmsk.dts | 5
On reset, the RTC loads the 2000-01-01 date with a wrong day of the
week (Sunday instead of Saturday).
Signed-off-by: Dario Binacchi
---
drivers/rtc/davinci.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c
index b0a077cba7
The RTC module contains a kicker mechanism to prevent any spurious
writes from changing the register values. To set the time, you must
first unlock the TC registers, update them and then lock.
Signed-off-by: Dario Binacchi
---
drivers/rtc/davinci.c | 14 ++
1 file changed, 14
To write correct data to the TC registers, the STATUS register must be
read until the BUSY bit is equal to zero. Once the BUSY flag is zero,
there is a 15 μs access period in which the TC registers can be
programmed.
The rtc_wait_not_busy() has been inspired by the Kernel.
Signed-off-by: Dario
Use 32-bit access only where it is needed. Most of the RTC registers
contain useful information in the 8 least significant bits, the others
are reserved.
Signed-off-by: Dario Binacchi
---
drivers/rtc/davinci.c | 32
1 file changed, 16 insertions(+), 16
The Davinci's onchip RTC is also present on TI OMAP1, AM33XX, AM43XX and
DRA7XX SOCs. So, let's enable compilation for these architectures too.
Signed-off-by: Dario Binacchi
---
drivers/rtc/Kconfig | 7 +++
drivers/rtc/davinci.c | 11 ---
2 files changed, 15 insertions(+), 3
The series adds driver model support for omap RTC plus some fixes.
Dario Binacchi (7):
rtc: davinci: enable compilation for omap architectures
rtc: davinci: replace 32bit access with 8bit access
rtc: davinci: check BUSY bit before set TC registers
rtc: davinci: use unlock/lock
is derived from the physical
> > address width of that platform.
> >
> > So, what is that functions actually supposed to do?
>
> +Dario Binacchi +Mario Six
>
> I suspect the code has got ahead of the docs.
>
> d64b9cdcd47 fdt: translate address if #size-cells
Hi Jan,
> Il 01/05/2021 14:29 Jan Kiszka ha scritto:
>
>
> On 11.04.21 09:39, Dario Binacchi wrote:
> > Use dev_read_addr_size to get size of the controller's register area.
> >
> > Signed-off-by: Dario Binacchi
> > Reviewed-by: Pratyush Yadav
>
translation function fixed the issue with
appropriate platform code.
[1]
https://patchwork.ozlabs.org/project/uboot/patch/1614324949-61314-1-git-send-email-bmeng...@gmail.com/
[2]
https://lore.kernel.org/linux-clk/20210402192054.7934-1-dario...@libero.it/T/
Signed-off-by: Dario Binacchi
Reviewed
.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/clk/ti/clk-am3-dpll.c | 86 +--
1 file changed, 53 insertions(+), 33 deletions(-)
diff --git a/drivers/clk/ti/clk-am3-dpll.c b/drivers/clk/ti/clk-am3-dpll.c
index 90b4cc69ef..916d308034 100644
Replaces the common memory access functions used by the driver with the
ones exported from the TI clk module.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/clk/ti/clk-gate.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers
4949-61314-1-git-send-email-bmeng...@gmail.com/
[2]
https://lore.kernel.org/linux-clk/20210402192054.7934-1-dario...@libero.it/T/
Signed-off-by: Dario Binacchi
---
Changes in v2:
- Remove #if CONFIG_IS_ENABLED(AM33XX). It was counter intuitive.
drivers/c
The clock access functions exported by the clk header use the
struct clk_ti_reg parameter to get the address of the register. This
must also apply to clk_ti_latch(). Changes to TI's clk-mux and
clk-divider drivers prevented the patch from generating compile errors.
Signed-off-by: Dario Binacchi
Reviewed-by tag.
Dario Binacchi (5):
clk: ti: add custom API for memory access
clk: ti: change clk_ti_latch() signature
clk: ti: gate: use custom API for memory access
clk: ti: am3-dpll: use custom API for memory access
Revert "fdt: translate address if #size-cells = <0>&q
Hi Tero,
> Il 27/04/2021 09:01 Tero Kristo ha scritto:
>
>
> Hi Dario,
>
> One question below.
>
> On 25/04/2021 17:17, Dario Binacchi wrote:
> > As pointed by [1] and [2], commit
> > d64b9cdcd4 ("fdt: translate address if #size-cells = <0>&quo
translation function fixed the issue with
appropriate platform code.
[1]
https://patchwork.ozlabs.org/project/uboot/patch/1614324949-61314-1-git-send-email-bmeng...@gmail.com/
[2]
https://lore.kernel.org/linux-clk/20210402192054.7934-1-dario...@libero.it/T/
Signed-off-by: Dario Binacchi
.
Signed-off-by: Dario Binacchi
---
drivers/clk/ti/clk-am3-dpll.c | 86 +--
1 file changed, 53 insertions(+), 33 deletions(-)
diff --git a/drivers/clk/ti/clk-am3-dpll.c b/drivers/clk/ti/clk-am3-dpll.c
index 90b4cc69ef..916d308034 100644
--- a/drivers/clk/ti/clk-am3
The clock access functions exported by the clk header use the
struct clk_ti_reg parameter to get the address of the register. This
must also apply to clk_ti_latch(). Changes to TI's clk-mux and
clk-divider drivers prevented the patch from generating compile errors.
Signed-off-by: Dario Binacchi
4949-61314-1-git-send-email-bmeng...@gmail.com/
[2]
https://lore.kernel.org/linux-clk/20210402192054.7934-1-dario...@libero.it/T/
Signed-off-by: Dario Binacchi
---
drivers/clk/ti/clk.c | 92
drivers/clk/ti/clk.h | 13 +++
2 files changed, 105 ins
Replaces the common memory access functions used by the driver with the
ones exported from the TI clk module.
Signed-off-by: Dario Binacchi
---
drivers/clk/ti/clk-gate.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/ti/clk-gate.c b
Kernel code.
[1]
https://patchwork.ozlabs.org/project/uboot/patch/1614324949-61314-1-git-send-email-bmeng...@gmail.com/
[2]
https://lore.kernel.org/linux-clk/20210402192054.7934-1-dario...@libero.it/T/
Dario Binacchi (5):
clk: ti: add custom API for memory access
clk: ti: change clk_ti_latch()
As reported by Coverity Scan for Das U-Boot, the 'less-than-zero'
comparison of an unsigned value is never true.
Signed-off-by: Dario Binacchi
Reviewed-by: Pratyush Yadav
---
Changes in v2:
- Balance quote in commit message
- Add review tag
drivers/pinctrl/pinctrl-single.c | 4 ++--
1 file
As reported by Coverity Scan for Das U-Boot, the 'less-than-zero
comparison of an unsigned value is never true.
Signed-off-by: Dario Binacchi
---
drivers/pinctrl/pinctrl-single.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers
Otherwise it can generate a division by zero, which has an undefined
behavior.
Signed-off-by: Dario Binacchi
---
drivers/pinctrl/pinctrl-single.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index 7e1c5bb0a5
Hi Tom,
> Il 19/04/2021 14:20 Tom Rini ha scritto:
>
>
> Hey all,
>
> Here's the latest report.
>
> - Forwarded message from scan-ad...@coverity.com -
>
> Date: Mon, 19 Apr 2021 01:18:55 + (UTC)
> From: scan-ad...@coverity.com
> To: tom.r...@gmail.com
> Subject: New Defects
is used on sandbox.
Signed-off-by: Dario Binacchi
Reviewed-by: Simon Glass
---
Changes in v4:
- Added CONFIG_PINCTRL_SINGLE to sandbox_flattree_defconfig to fix
sandbox_flattree test errors.
Changes in v2:
- Added Simon Glass review tag.
- Added error checking when the 'width' property
a generic type driver, and it can be useful for debug
purposes.
Signed-off-by: Dario Binacchi
Reviewed-by: Simon Glass
---
(no changes since v3)
Changes in v3:
- Added Simon Glass review tag.
drivers/pinctrl/pinctrl-single.c | 222 +--
1 file changed, 213
It returns the number of selectable pins.
Signed-off-by: Dario Binacchi
Reviewed-by: Simon Glass
---
(no changes since v2)
Changes in v2:
- Added Simon Glass review tag.
drivers/pinctrl/pinctrl-single.c | 37
1 file changed, 37 insertions(+)
diff --git
It returns the name of the requested pin.
Signed-off-by: Dario Binacchi
Reviewed-by: Simon Glass
---
(no changes since v2)
Changes in v2:
- Added Simon Glass review tag.
drivers/pinctrl/pinctrl-single.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/pinctrl
The configuration of pinmux registers was implemented with duplicate
code which can be removed by adding two functions for read/write access.
Access to 8-bit registers has also been added.
Signed-off-by: Dario Binacchi
Reviewed-by: Simon Glass
---
(no changes since v3)
Changes in v3:
- Added
The patch is inspired by more recent versions of the Linux driver.
Replacing the default value 0x of the function mask with 0 is
certainly more conservative in case the "pinctrl-single,function-mask"
DT property is missing.
Signed-off-by: Dario Binacchi
Reviewed-by: S
Signed-off-by: Dario Binacchi
Reviewed-by: Simon Glass
---
(no changes since v2)
Changes in v2:
- Updated commit message.
- Added Simon Glass review tag.
drivers/pinctrl/pinctrl-single.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-
The dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", , val); prints the 'reg'
address preceded by the prefix 0x0x instead of 0x. This because the
printf '%pa' format specifier already prepends the prefix '0x' to the
address displayed.
Signed-off-by: Dario Binacchi
Reviewed-by: Prat
option than a physical address.
Signed-off-by: Dario Binacchi
Reviewed-by: Pratyush Yadav
---
(no changes since v3)
Changes in v3:
- Added Pratyush Yadav review tag.
drivers/pinctrl/pinctrl-single.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git
Use dev_read_addr_size to get size of the controller's register area.
Signed-off-by: Dario Binacchi
Reviewed-by: Pratyush Yadav
---
(no changes since v3)
Changes in v3:
- Added Pratyush Yadav review tag.
Changes in v2:
- Check dev_read_addr_size return value.
drivers/pinctrl/pinctrl
The 'n' variable is used as a loop counter, not as a physical address,
and is used in a comparison with an int. So it makes sense to change
its type from phys_addr_t to int.
Signed-off-by: Dario Binacchi
Reviewed-by: Simon Glass
Reviewed-by: Pratyush Yadav
---
(no changes since v2)
Changes
U-Boot adopted the kernel-doc annotation style.
Signed-off-by: Dario Binacchi
Reviewed-by: Simon Glass
---
(no changes since v2)
Changes in v2:
- Added Simon Glass review tag.
drivers/pinctrl/pinctrl-single.c | 45 +---
1 file changed, 36 insertions(+), 9
tions.
- Added Simon Glass review tag.
- Added Simon Glass review tag.
- Added Simon Glass review tag.
- Added error checking when the 'width' property is missing.
- Fix coding style.
Dario Binacchi (12):
pinctrl: single: fix format of structure documentation
pinctrl: single: fix the loop co
Hi Lokesh,
> Il 09/04/2021 09:21 Lokesh Vutla ha scritto:
>
>
> Hi Dario,
>
> On 28/02/21 7:42 pm, Dario Binacchi wrote:
> >
> > The series was born from the need to check the pinmux setting of a
> > peripheral on a beaglebone board. I then ra
> Il 06/04/2021 16:26 Rob Herring ha scritto:
>
>
> On Tue, Mar 16, 2021 at 8:26 PM Bin Meng wrote:
> >
> > Hi Dario,
> >
> > On Wed, Mar 17, 2021 at 4:57 AM Dario Binacchi wrote:
> > >
> > > Hi Bin,
> > >
> > > >
Hi Bin,
> Il 22/03/2021 02:25 Bin Meng ha scritto:
>
>
> Hi Dario,
>
> On Sun, Mar 21, 2021 at 11:19 PM Dario Binacchi wrote:
> >
> > Hi Tom,
> >
> > > Il 18/03/2021 20:51 Tom Rini ha scritto:
> > >
> > >
> > > On Thu
Hi Tom,
> Il 18/03/2021 20:51 Tom Rini ha scritto:
>
>
> On Thu, Mar 18, 2021 at 08:27:49AM +0100, Dario Binacchi wrote:
> > Hi Bin,
> >
> > > Il 17/03/2021 02:26 Bin Meng ha scritto:
> > >
> > >
> > > Hi Dario,
> &
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