[U-Boot] [PATCH] ns16550: change to allow 32 bit access to registers

If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory mapped access will be used to read/write the uart registers. This is especially useful for SoC devices that implement 16550 compatible uarts but that have peripheral access width constraints. Signed-off-by: Dave Aldridge --- drivers

[U-Boot] [PATCH 0/4] Add Cadence GEM support to macb Ethernet driver

Picochip picoXcell based development platform. Dave Aldridge (4): macb: initial support for Cadence GEM macb: support higher rate GEM MDIO clock divisors macb: support DMA bus widths > 32 bits macb: allow GEM to have configurable receive buffer size drivers/net/macb.c |

[U-Boot] [PATCH 1/4] macb: initial support for Cadence GEM

register base register locations in GEM. Signed-off-by: Dave Aldridge --- drivers/net/macb.c | 18 +++- drivers/net/macb.h | 55 2 files changed, 67 insertions(+), 6 deletions(-) diff --git a/drivers/net/macb.c b/drivers/net/macb.c

[U-Boot] [PATCH 2/4] macb: support higher rate GEM MDIO clock divisors

GEM devices support larger clock divisors and have a different range of divisors. Program the MDIO clock divisors based on the device type. Signed-off-by: Dave Aldridge --- drivers/net/macb.c | 63 ++-- drivers/net/macb.h | 12 ++ 2

[U-Boot] [PATCH 3/4] macb: support DMA bus widths > 32 bits

Some GEM implementations may support DMA bus widths up to 128 bits. We can get the maximum supported DMA bus width from the design configuration register so use that to program the device up. Signed-off-by: Dave Aldridge --- drivers/net/macb.c | 25 + drivers/net

[U-Boot] [PATCH 4/4] macb: allow GEM to have configurable receive buffer size

GEM has configurable receive buffer sizes so requires this to be programmed up. Signed-off-by: Dave Aldridge --- drivers/net/macb.c | 19 +++ drivers/net/macb.h |5 + 2 files changed, 24 insertions(+), 0 deletions(-) diff --git a/drivers/net/macb.c b/drivers/net

Re: [U-Boot] [PATCH 1/4] macb: initial support for Cadence GEM

On 18/08/11 15:03, Andreas Bießmann wrote: > Dear Dave Aldrige, > > Am 18.08.2011 15:32, schrieb Dave Aldridge: >> The Cadence GEM is based on the MACB Ethernet controller but has a few >> small changes with regards to register and bitfield placement. This >> patch de

[U-Boot] [PATCH v2] ns16550: change to allow 32 bit access to registers

If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory mapped access will be used to read/write the uart registers. This is especially useful for SoC devices that implement 16550 compatible uarts but that have peripheral access width constraints. Signed-off-by: Dave Aldridge --- Changes for

[U-Boot] [PATCH v3] ns16550: change to allow 32 bit access to registers

If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory mapped access will be used to read/write the uart registers. This is especially useful for SoC devices that implement 16550 compatible uarts but that have peripheral access width constraints. Signed-off-by: Dave Aldridge --- Changes for

Re: [U-Boot] [PATCH v3] ns16550: change to allow 32 bit access to registers

Hi Tabi Timur-B04825 On 01/09/11 16:39, Tabi Timur-B04825 wrote: > On Thu, Sep 1, 2011 at 6:40 AM, Dave Aldridge wrote: > >> #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE >> == 0) >> #error "Please define NS16550 regis

[U-Boot] [PATCH v4] ns16550: change to allow 32 bit access to registers

If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory mapped access will be used to read/write the uart registers. This is especially useful for SoC devices that implement 16550 compatible uarts but that have peripheral access width constraints. Signed-off-by: Dave Aldridge --- Changes for

Re: [U-Boot] [PATCH v3] ns16550: change to allow 32 bit access to registers

Hi Wolfgang On 07/09/11 22:22, Wolfgang Denk wrote: > Dear Dave Aldridge, > > In message <1314877212-31552-1-git-send-email-fovs...@gmail.com> you wrote: >> If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory >> mapped access will be used to read/write the ua

Re: [U-Boot] [PATCH v4] ns16550: change to allow 32 bit access to registers

Hi Wolfgang On 07/09/11 22:36, Wolfgang Denk wrote: > Dear Dave Aldridge, > > In message <1314953234-3977-1-git-send-email-fovs...@gmail.com> you wrote: >> If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory >> mapped access will be used to read/write the uart

Re: [U-Boot] [PATCH v3] ns16550: change to allow 32 bit access to registers

Hi Detlev On 09/09/11 13:09, Detlev Zundel wrote: > Hi, > >> Dear Dave Aldridge, >> >> In message <1314877212-31552-1-git-send-email-fovs...@gmail.com> you wrote: >>> If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory >>> mapped acce

[U-Boot] [PATCH v2 1/4] macb: initial support for Cadence GEM

register base register locations in GEM. Signed-off-by: Dave Aldridge --- Changes for v2: - Cleaned up issues reported by checkpatch drivers/net/macb.c | 18 +++- drivers/net/macb.h | 55 2 files changed, 67 insertions(+), 6

[U-Boot] [PATCH v2 2/4] macb: support higher rate GEM MDIO clock divisors

GEM devices support larger clock divisors and have a different range of divisors. Program the MDIO clock divisors based on the device type. Signed-off-by: Dave Aldridge --- drivers/net/macb.c | 63 ++-- drivers/net/macb.h | 12 ++ 2

[U-Boot] [PATCH v2 4/4] macb: allow GEM to have configurable receive buffer size

GEM has configurable receive buffer sizes so requires this to be programmed up. Signed-off-by: Dave Aldridge --- drivers/net/macb.c | 19 +++ drivers/net/macb.h |5 + 2 files changed, 24 insertions(+), 0 deletions(-) diff --git a/drivers/net/macb.c b/drivers/net

[U-Boot] [PATCH v2 3/4] macb: support DMA bus widths > 32 bits

Some GEM implementations may support DMA bus widths up to 128 bits. We can get the maximum supported DMA bus width from the design configuration register so use that to program the device up. Signed-off-by: Dave Aldridge --- drivers/net/macb.c | 25 + drivers/net