Hello Joel,
Thanks for your reply.
> >
> > Add support of Aspeed AST2700 SoC. AST2700 is based on ARM64 so
> > modify the DMA address related code to fit both ARM and ARM64.
> > Besides, the RMII/RGMII mode control register is moved from SCU500 to
> > MAC50 so initialize the register in ftgmac10
The AST2700 is the 7th generation SoC from Aspeed.
And use the driver to support clause 22 access.
Signed-off-by: Jacky Chou
---
drivers/net/aspeed_mdio.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/aspeed_mdio.c b/drivers/net/aspeed_mdio.c
index f2e4392aa9..2e1f3cdf11
Add support of Aspeed AST2700 SoC. AST2700 is based on ARM64 so modify
the DMA address related code to fit both ARM and ARM64. Besides, the
RMII/RGMII mode control register is moved from SCU500 to MAC50 so
initialize the register in ftgmac100_start correspondingly.
Signed-off-by: Jacky Chou
to cache line size.
Only one desc will be flushed or invalidated at a time.
Signed-off-by: Jacky Chou
---
drivers/net/ftgmac100.c | 13 -
drivers/net/ftgmac100.h | 5 +++--
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100
The NC-SI interface does not need the MDIO bus and the
NC-SI PHY device cannot get from dm_eth_phy_connect.
Therefore, use phy_connect directly here.
Signed-off-by: Jacky Chou
---
drivers/net/ftgmac100.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ftgmac100.c
cache will perform a writeback action to
affect the MAC receiving packets.
Avoid the same problem that occurs in other networking protocols.
In the free_pkt function, ensure cache and memory consistency.
Signed-off-by: Jacky Chou
---
drivers/net/ftgmac100.c | 8
1 file changed, 8 inser
> On Sun, Mar 03, 2024 at 02:14:43AM +0000, Jacky Chou wrote:
> > Hi Dan Carpenter,
> >
> > I have verified it on the little-endian platform, such as ASPEED AST2600.
>
> Awesome. Thanks for this.
>
> > I think put_unaligned_be32() and htonl() functions have
寄件者: Dan Carpenter
寄件日期: 2024年2月5日 下午 11:04
收件者: Jacky Chou
副本: joe.hershber...@ni.com ; rfried@gmail.com
; tr...@konsulko.com ;
michal.si...@amd.com ; marek.vasut+rene...@mailbox.org
; u-boot@lists.denx.de ;
BMC-SW
主旨: Re: [PATCH] net: phy: ncsi: Correct
>From the ethernet header is not on aligned, because the length
of the ethernet header is 14 bytes.
Therefore, unaligned access must be done here.
Signed-off-by: Jacky Chou
---
drivers/net/phy/ncsi.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/
There is no need to perform the endian twice here.
Signed-off-by: Jacky Chou
---
drivers/net/phy/ncsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/ncsi.c b/drivers/net/phy/ncsi.c
index eb3fd65bb4..74c5386d2e 100644
--- a/drivers/net/phy/ncsi.c
+++ b
As with fixed-link phy device, the NC-SI phy devive does not
require an mdio bus. So, a condition is added to check the
NC-SI phy id to avoid accessing the bus pointer that is NULL.
Signed-off-by: Jacky Chou
---
drivers/net/phy/phy.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
The issue occurs the UAF (use-after-free) to cause double free
when do the realloc function for the pointers during the
reinitialization NC-SI process, and it will cause the memory
management occurs error.
So, nullify these pointers after free.
Signed-off-by: Jacky Chou
---
drivers/net/phy
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