Sorry to resend this, I forget to re-subscribe mail list. The 'sdmmc0m1_gpio' is defined, more see last email.
Thanks, - Jason Jason Lee <jason416...@gmail.com> 于2021年8月12日周四 上午9:57写道: > > The 'sdmmc0m1_gpio' is defined in arch/arm/dts/rk3328.dtsi, which is > included at the beginning of rk3328-nanopi-r2s.dts. > > The node is : > sdmmc0-1 { > sdmmc0m1_pwren: sdmmc0m1-pwren { > rockchip,pins = <0 RK_PD6 3 &pcfg_pull_up_4ma>; > }; > > sdmmc0m1_gpio: sdmmc0m1-gpio { > rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>; > }; > }; > > > Thanks, > > -Jason > > Kever Yang <kever.y...@rock-chips.com> 于2021年8月12日周四 上午8:56写道: > > > > > > On 2021/8/11 下午6:05, Kever Yang wrote: > > > Adam Lee <jason416...@gmail.com> 于2021年7月6日周二 下午10:42写道: > > >> From 29cf326e24b657180e4cf90ded2366d49f33e88e Mon Sep 17 00:00:00 2001 > > >> From: jason416 <jason416...@gmail.com> > > >> Date: Mon, 5 Jul 2021 23:22:29 +0800 > > >> Subject: [PATCH] rockchip: rk3328: fix booting error for nanopi-r2s > > >> > > >> devices can not boot properly during SPL stage by > > >> using microSD card which model is SDSQUNC-032G-ZN6MA. > > >> > > >> U-Boot SPL 2021.04 (Jul 02 2021 - 19:50:12 +0000) > > >> Trying to boot from MMC1 > > >> mmc_load_image_raw_sector: mmc block read error > > >> SPL: failed to boot from all boot devices > > >> > > >> change dts and config to support booting from ultra > > >> high speed microSD card on nanopi-r2s. > > >> > > >> Signed-off-by: jason416 <jason416...@gmail.com> > > > Reviewed-by: Kever Yang <kever.y...@rock-chips.com> > > > > > > Thanks, > > > - Kever > > >> --- > > >> arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 4 ++++ > > >> arch/arm/dts/rk3328-nanopi-r2s.dts | 2 +- > > >> configs/nanopi-r2s-rk3328_defconfig | 4 ++++ > > >> 3 files changed, 9 insertions(+), 1 deletion(-) > > >> > > >> diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts > > >> /rk3328-nanopi-r2s-u-boot.dtsi > > >> index 9e2ced1541..d5469748a2 100644 > > >> --- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi > > >> +++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi > > >> @@ -33,6 +33,10 @@ > > >> u-boot,dm-spl; > > >> }; > > >> > > >> +&vcc_io_sdio { > > >> + u-boot,dm-spl; > > >> +}; > > >> + > > >> &gmac2io { > > >> snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; > > >> snps,reset-active-low; > > >> diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts > > >> b/arch/arm/dts/rk3328-nanopi > > >> -r2s.dts > > >> index 5445c5cb3d..452e4764e6 100644 > > >> --- a/arch/arm/dts/rk3328-nanopi-r2s.dts > > >> +++ b/arch/arm/dts/rk3328-nanopi-r2s.dts > > >> @@ -323,7 +323,7 @@ > > >> bus-width = <4>; > > >> cap-sd-highspeed; > > >> disable-wp; > > >> - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, > > >> <&sdmmc0_bus4>; > > >> + pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, > > >> <&sdmmc0_bus4>, <&sdmmc0m1_gpio>; > > > > The 'sdmmc0m1_gpio' is not defined. > > > > > > Thanks, > > > > - Kever > > > > >> pinctrl-names = "default"; > > >> sd-uhs-sdr12; > > >> sd-uhs-sdr25; > > >> diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi > > >> -r2s-rk3328_defconfig > > >> index 52996266a1..a7969bd7ab 100644 > > >> --- a/configs/nanopi-r2s-rk3328_defconfig > > >> +++ b/configs/nanopi-r2s-rk3328_defconfig > > >> @@ -56,6 +56,10 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800 > > >> CONFIG_FASTBOOT_CMD_OEM_FORMAT=y > > >> CONFIG_ROCKCHIP_GPIO=y > > >> CONFIG_SYS_I2C_ROCKCHIP=y > > >> +CONFIG_MMC_IO_VOLTAGE=y > > >> +CONFIG_SPL_MMC_IO_VOLTAGE=y > > >> +CONFIG_MMC_UHS_SUPPORT=y > > >> +CONFIG_SPL_MMC_UHS_SUPPORT=y > > >> CONFIG_MMC_DW=y > > >> CONFIG_MMC_DW_ROCKCHIP=y > > >> CONFIG_SF_DEFAULT_SPEED=20000000 > > >> -- > > >> 2.17.1 > > > > > > >