)
is greater than 0x500 the maximum liodn number.
Signed-off-by: Minghuan Lian
---
arch/powerpc/cpu/mpc85xx/b4860_ids.c | 8
arch/powerpc/cpu/mpc85xx/t4240_ids.c | 8
include/configs/B4860QDS.h | 2 ++
include/configs/t4qds.h | 1 +
4 files changed, 11
to
use 'Header Type' field to identify if the PCIE is EP or RC mode.
Signed-off-by: Minghuan Lian
---
drivers/pci/fsl_pci_init.c | 30 --
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci
default, so we
must set this bit before change DBI register value.
Signed-off-by: Roy Zang
Signed-off-by: Minghuan Lian
---
drivers/pci/pcie_layerscape.c | 47 ++-
1 file changed, 33 insertions(+), 14 deletions(-)
diff --git a/drivers/pci
The patch moves pcie_layerscape.h out of arm include to top
level include folder so that it can be shared on other Socs.
Signed-off-by: Minghuan Lian
---
arch/arm/include/asm/pcie_layerscape.h | 13 -
board/freescale/ls1021atwr/ls1021atwr.c | 3 ++-
drivers/pci/pcie_layerscape.c
The patch uses the common function name ft_pci_setup to replace
ft_pcie_setup, then removes unnecessary pcie_layerscape.h because
all the functions have been declared in common.h.
Signed-off-by: Minghuan Lian
---
change log:
v1-v2: remove unnecessary pcie_layerscape.h
arch/arm/include/asm
default, so we
must set this bit before change DBI register value.
Signed-off-by: Roy Zang
Signed-off-by: Minghuan Lian
---
change log:
v1-v2: no change
drivers/pci/pcie_layerscape.c | 47 ++-
1 file changed, 33 insertions(+), 14 deletions(-)
diff
patch is to set this bit according to PCIe version.
Signed-off-by: Ed Swarthout
Signed-off-by: Roy Zang
Signed-off-by: Minghuan Lian
---
arch/powerpc/include/asm/fsl_pci.h | 1 +
drivers/pci/fsl_pci_init.c | 8 +++-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch
The patch changes PCIe dts node status to 'disabled' if the
corresponding controller is disabled according to serdes protocol.
Signed-off-by: Minghuan Lian
---
arch/arm/include/asm/arch-ls102xa/config.h | 3 ++
arch/arm/include/asm/pcie_layerscape.h | 13
board
Signed-off-by: Minghuan Lian
---
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 697d4ca..440a5b4 100644
--- a/arch
- 4GB DDR0 space end
Signed-off-by: Minghuan Lian
---
arch/arm/cpu/armv7/ls102xa/cpu.c | 203 +++--
arch/arm/include/asm/arch-ls102xa/config.h | 14 ++
2 files changed, 207 insertions(+), 10 deletions(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arc
The patch adds Freescale Layerscape PCIe driver and provides
up to 4 controllers support.
Signed-off-by: Minghuan Lian
---
drivers/pci/pcie_layerscape.c | 471 +-
1 file changed, 466 insertions(+), 5 deletions(-)
diff --git a/drivers/pci
The patch enables and adds PCIe settings for boards LS1021AQDS
and LS1021ATWR.
Signed-off-by: Minghuan Lian
---
include/configs/ls1021aqds.h | 24
include/configs/ls1021atwr.h | 24
2 files changed, 48 insertions(+)
diff --git a/include/configs
Fix this:
drivers/pci/pci_rom.c:95:15: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
rom_header = (struct pci_rom_header *)rom_address;
Signed-off-by: Minghuan Lian
---
drivers/pci/pci_rom.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Fix this:
warning: cast from pointer to integer of different size
Signed-off-by: Minghuan Lian
---
drivers/net/e1000.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 6531030..cd44222 100644
The length of the receiving packet descriptor is a 16bit integer
not 32bit. le32_to_cpu should be replaced by le16_to_cpu to
make the correct conversion. Otherwise, e1000 cannot work on
some kinds of big-endian platform.
Signed-off-by: Minghuan Lian
---
drivers/net/e1000.c | 2 +-
1 file
The length of the receiving packet descriptor is a 16bit integer
not 32bit. le32_to_cpu should be replaced by le16_to_cpu to
make the correct conversion. Otherwise, e1000 cannot work on
some kinds of big-endian platform.
Signed-off-by: Minghuan Lian
---
drivers/net/e1000.c | 2 +-
1 file
Hi Stuart,
> -Original Message-
> From: Stuart Yoder [mailto:stuart.yo...@nxp.com]
> Sent: Monday, February 22, 2016 11:26 PM
> To: u-boot@lists.denx.de
> Cc: york sun ; Prabhakar Kushwaha
> ; Mingkai Hu ;
> Minghuan Lian ; Yang-Leo Li ;
> marc.zyng...@arm.com;
Hi Stuart,
Please see my comments inline.
Thanks,
Minghuan
> -Original Message-
> From: Stuart Yoder [mailto:stuart.yo...@nxp.com]
> Sent: Friday, February 26, 2016 7:06 AM
> To: u-boot@lists.denx.de
> Cc: york sun ; Prabhakar Kushwaha
> ; Mingkai Hu ;
> Minghu
Hi Stuart,
Please see my comments inline.
Thanks,
Minghuan
> -Original Message-
> From: Stuart Yoder [mailto:stuart.yo...@nxp.com]
> Sent: Friday, February 26, 2016 7:06 AM
> To: u-boot@lists.denx.de
> Cc: york sun ; Prabhakar Kushwaha
> ; Mingkai Hu ;
> Minghu
PCIe extends device's configuration space to 4k and provides
extended capability. The patch adds function to find them.
The code is ported from Linux PCIe driver.
Signed-off-by: Minghuan Lian
---
drivers/pci/pci.c | 45 +
include/pci.h
started at CONFIG_SYS_PCI_EP_MEMORY_BASE
iATU outbound 0 to map 4G memory space
Signed-off-by: Minghuan Lian
---
drivers/pci/pcie_layerscape.c | 137 +-
1 file changed, 135 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pcie_layerscape.c b/drivers
PCIe extends device's configuration space to 4k and provides
extended capability. The patch adds function to find them.
The code is ported from Linux PCIe driver.
Signed-off-by: Minghuan Lian
---
Change log:
v2-v1:
1. add a descriptor of pci_find_next_ext_capability
2. fix a typo
driver
started at CONFIG_SYS_PCI_EP_MEMORY_BASE
iATU outbound 0 to map 4G memory space
Signed-off-by: Minghuan Lian
---
Change log:
v2-v1: no change
drivers/pci/pcie_layerscape.c | 137 +-
1 file changed, 135 insertions(+), 2 deletions(-)
diff --git a/drivers
Signed-off-by: Minghuan Lian
---
arch/arm/dts/fsl-ls1046a.dtsi | 49 +++
1 file changed, 49 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index 87dd997..5d30112 100644
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b
Signed-off-by: Minghuan Lian
---
include/configs/ls1046a_common.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 7c5e635..f8f5ee2 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs
for the legacy PCI driver, the function pci_bus_to_hose() returns
the real PCIe controller. To keep consistency, this function is
changed to return the PCIe controller pointer of the root bus
instead of the current PCIe bus.
Signed-off-by: Minghuan Lian
---
drivers/pci/pci_compat.c | 2 +-
1
Signed-off-by: Minghuan Lian
---
arch/arm/dts/fsl-ls2080a.dtsi | 60 +++
1 file changed, 60 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index b308c8b..4ed066f 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b
Signed-off-by: Minghuan Lian
---
include/configs/ls1046a_common.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 7c5e635..f8f5ee2 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs
Signed-off-by: Minghuan Lian
---
arch/arm/dts/fsl-ls1043a.dtsi | 46 +++
1 file changed, 46 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index a8bffba..a9894d0 100644
--- a/arch/arm/dts/fsl-ls1043a.dtsi
+++ b
There may be multiple PCIe controllers in a SoC.
It is not correct that always calling pci_bus_to_hose(0) to get
the first PCIe controller for the PCIe device connected other
controllers. We just remove this calling because hose always point
the correct PCIe controller.
Signed-off-by: Minghuan
Signed-off-by: Minghuan Lian
---
arch/arm/dts/ls1021a.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 119b1af..e06cf60 100644
--- a/arch/arm/dts/ls1021a.dtsi
+++ b/arch/arm/dts/ls1021a.dtsi
Signed-off-by: Minghuan Lian
---
arch/arm/dts/fsl-ls1012a.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi
index 024527e..c4ca9c1 100644
--- a/arch/arm/dts/fsl-ls1012a.dtsi
+++ b/arch/arm/dts/fsl-ls1012a.dtsi
There are more than five kinds of Layerscape SoCs. unfortunately,
PCIe controller of each SoC is a little bit different. In order
to avoid too many macro definitions, the patch re-implement PCIe
driver based on DM. PCIe dts node is to describe the difference.
Signed-off-by: Minghuan Lian
For the function alloc_stream_ids() append_mmu_masters() and
fdt_fixup_smmu_pcie() there are no related definitions and they
are never called. So the patch removes the unnecessary declares.
Signed-off-by: Minghuan Lian
---
arch/arm/include/asm/arch-fsl-layerscape/fdt.h | 4
1 file changed
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