Hi there, I'm having this subtle issue where if I put my ARM device (U-boot + Linux) under soft reboot cycle (stress test), it fails after 100+ cycles. The serial output I capture in failed scenario is: ... g_txrx_mode=1 g_profileid=1 id=0x1F11 board_type=0x0004 HAS_POE_SUPPORT=1 Not POE read_rbf_header_from_ext4 - filename = e30.core.rbf filesize = 7317252 cff_from_mmc_ext4:writing e30.core.rbf length 13 num_files 0 Full Configuration Succeeded. crestron_load_rbf: use core e30.core.rbf length 13 rval 1 Booting from primary Writing to MMC(0)... done dram_init: id 1f11 (id & 0x0001) 1 has_dsp/has_dante0 DDRCAL: Success INFO : Skip relocation as SDRAM is non secure memory Reserving 2048 Bytes for IRQ stack at: ffe2f708 DRAM : 512 MiB
On a successful reboot, next printed lines are: WARNING: Caches not enabled MMC: In: serial Out: serial Err: serial it seems it failed between 'skip_relocation()' and 'enable_caches()'. but why after 100+ attempts? Could it be memory issue? Memory timing issue? And how can I debug it? Regards, Muzammal Ahmed | Firmware Engineer Phone: 800-237-2041 Ext: 12505 Email: mah...@crestron.com Crestron Electronics, Inc. 22 Link Drive, Rockleigh, NJ, 07647 [www.crestron.com]<http://www.crestron.com> This e-mail message and all attachments transmitted with it may contain legally privileged and confidential information intended solely for the use of the addressee. If you are not the intended recipient, you are hereby notified that any reading, dissemination, distribution, copying, or other use of this message or its attachments is strictly prohibited.
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