> On Mon, 27 Jun 2022 at 08:55, Neal Liu wrote:
> >
> > > Reviewed-by: Chia-Wei Wang
> > >
> > > The QEMU emulation issue is under investigation by Steven.
> > > The CRC32 and MD5 SW support will be added before we re-enabling HW
> > >
> Hello Neal
>
> On 6/27/22 10:55, Neal Liu wrote:
> >> Reviewed-by: Chia-Wei Wang
> >>
> >> The QEMU emulation issue is under investigation by Steven.
> >> The CRC32 and MD5 SW support will be added before we re-enabling HW
> >> cry
> Reviewed-by: Chia-Wei Wang
>
> The QEMU emulation issue is under investigation by Steven.
> The CRC32 and MD5 SW support will be added before we re-enabling HW
> crypto drivers.
>
> Chiawei
>
> > From: joel.s...@gmail.com On Behalf Of Joel
> > Stanley
> > Sent: Monday, June 27, 2022 3:58 PM
fied
> - Enable CONFIG_SPL_SEPARATE_BSS kconfig option
>
> Signed-off-by: Chia-Wei Wang
LGTM.
Reviewed-by: Neal Liu
Best Regards,
-Neal
> ---
> arch/arm/mach-aspeed/ast2600/u-boot-spl.lds | 94
> +
> configs/evb-ast2600_defconfig | 3 +
>
Check interrupt status to see if RSA engine is completed. After completion
of the task, write-clear the status to finish operation.
Add missing register base for completion.
Fixes: 89c36cca0b6 ("crypto: aspeed: Add AST2600 ACRY support")
Signed-off-by: Neal Liu
Reviewed-by: Chi
> -Original Message-
> From: ChiaWei Wang
> Sent: Tuesday, February 15, 2022 5:58 PM
> To: Neal Liu ; Ryan Chen
> ; u-boot@lists.denx.de
> Cc: BMC-SW
> Subject: RE: [PATCH] crypto: aspeed: fix polling RSA status wrong issue
>
> > From: Neal Liu
> > S
Check interrupt status to see if RSA engine is completed. After completion
of the task, write-clear the status to finish operation.
Add missing register base for completion.
Signed-off-by: Neal Liu
---
drivers/crypto/aspeed/aspeed_acry.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
7 matches
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