>-Original Message-
>From: Heinrich Schuchardt
>Sent: 18 January 2021 02:57
>To: Rick Chen
>Cc: Atish Patra ; Bin Meng ;
>Pragnesh Patel ; u-boot@lists.denx.de; Heinrich
>Schuchardt
>Subject: [PATCH 1/1] cmd/riscv/sbi: support System Reset Extension
>
>
Added support for timer_early_get_count() and timer_early_get_rate()
This is mostly useful in tracing.
Signed-off-by: Pragnesh Patel
Reviewed-by: Rick Chen
---
Changes in v4:
- Rebase on master
Changes in v3:
- Add IS_ENABLED(CONFIG_TIMER_EARLY) for timer_early_get_rate()
and
gd->timer = NULL, so
timer_get_us() -> get_ticks() -> dm_timer_init() will lead to an
indefinite recursion.
So select TIMER_EARLY when tracing got enabled.
Signed-off-by: Pragnesh Patel
Reviewed-by: Simon Glass
Reviewed-by: Rick Chen
---
Changes in v4:
- no change
Changes in v3:
Hi Rick
On Tue, Jan 12, 2021 at 7:30 AM Rick Chen wrote:
>
> Hi Pragnesh
>
> > > From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> > > Sent: Sunday, January 10, 2021 8:43 PM
> > > To: u-boot@lists.denx.de
> > > Cc: atish.pa...@wdc.com;
Hi Tom,
Any comment on this ?
On Tue, Dec 22, 2020 at 11:30 AM Pragnesh Patel
wrote:
>
> Add the command "pwm" for controlling the pwm channels. This
> command provides pwm invert/config/enable/disable functionalities
> via PWM uclass drivers
>
> Signed-off-by: P
Added support for timer_early_get_count() and timer_early_get_rate()
This is mostly useful in tracing.
Signed-off-by: Pragnesh Patel
---
Changes in v3:
- Add IS_ENABLED(CONFIG_TIMER_EARLY) for timer_early_get_rate()
and timer_early_get_count() functions.
Changes in v2:
- make u-boot compile
gd->timer = NULL, so
timer_get_us() -> get_ticks() -> dm_timer_init() will lead to an
indefinite recursion.
So select TIMER_EARLY when tracing got enabled.
Signed-off-by: Pragnesh Patel
Reviewed-by: Simon Glass
Reviewed-by: Rick Chen
---
Changes in v3:
- no change
Changes in v2:
Hi Rick,
On Wed, Jan 6, 2021 at 7:28 AM Rick Chen wrote:
>
> Hi Pragnesh
>
> > On Tue, Jan 5, 2021 at 7:12 AM Sean Anderson wrote:
> > >
> > > On 1/4/21 8:37 PM, Rick Chen wrote:
> > > > Hi Pragnesh
> > > >
> > > >>
On Tue, Jan 5, 2021 at 7:12 AM Sean Anderson wrote:
>
> On 1/4/21 8:37 PM, Rick Chen wrote:
> > Hi Pragnesh
> >
> >>> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> >>> Sent: Tuesday, December 22, 2020 2:23 PM
> >>> To: u-boot@l
Added support for timer_early_get_count() and timer_early_get_rate()
This is mostly useful in tracing.
Signed-off-by: Pragnesh Patel
---
Changes in v2:
- make u-boot compile for qemu (include/configs/qemu-riscv.h)
drivers/timer/andes_plmt_timer.c | 21 -
drivers/timer
gd->timer = NULL, so
timer_get_us() -> get_ticks() -> dm_timer_init() will lead to an
indefinite recursion.
So select TIMER_EARLY when tracing got enabled.
Signed-off-by: Pragnesh Patel
---
Changes in v2:
- new patch
lib/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/l
Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers
Signed-off-by: Pragnesh Patel
Reviewed-by: Simon Glass
---
Changes in v4:
- Add ut_assertok() for every run_command()
Changes in v3:
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 10 December 2020 08:36
>To: Pragnesh Patel
>Cc: Simon Glass ; U-Boot Mailing List b...@lists.denx.de>; Atish Patra ; Bin Meng
>; Paul Walmsley ( Sifive) ;
>Anup Patel ; Sagar Kadam
>; Palmer Dabbelt ; r
Hi Simon,
>-Original Message-
>From: Simon Glass
>Sent: 12 December 2020 21:05
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; Palmer Dabbelt ; Bin
>Meng ; Paul Walmsley ( Sifive)
>; Anup Patel ; Sagar Kadam
>; rick ; Naoki Hayama
>; Marek Va
Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers
Signed-off-by: Pragnesh Patel
Reviewed-by: Simon Glass
---
Changes in v3:
- Replace goto with return
- Print return value for error
-
Forgot to add "Reviewed-by: Simon Glass " tag, will resend
this patch.
>-Original Message-
>From: Pragnesh Patel
>Sent: 03 December 2020 10:21
>To: u-boot@lists.denx.de
>Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com;
>Paul Walmsley (
Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers
Signed-off-by: Pragnesh Patel
---
Changes in v3:
- Replace goto with return
- Print return value for error
- Change the assert con
Hi Rick,
[...]
>>
>>Following are the configurations, steps and debug logs:
>>
>>+++ b/configs/ae350_rv64_defconfig
>>q+CONFIG_TRACE=y
>>+CONFIG_TRACE_BUFFER_SIZE=0x0100
>>+CONFIG_TRACE_CALL_DEPTH_LIMIT=15
>>+CONFIG_CMD_TRACE=y
>>+CONFIG_TIMER_EARLY=y
>>
>>+++ b/configs/ae350_rv64_spl_defconfi
Hi Simon,
>-Original Message-
>From: U-Boot On Behalf Of Pragnesh Patel
>Sent: 01 December 2020 11:17
>To: Simon Glass
>Cc: U-Boot Mailing List ; Atish Patra
>; Palmer Dabbelt ; Bin
>Meng ; Paul Walmsley ( Sifive)
>; Anup Patel ; Sagar Kadam
>; rick ;
Hi Simon,
>-Original Message-
>From: Simon Glass
>Sent: 01 December 2020 01:42
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; Palmer Dabbelt ; Bin
>Meng ; Paul Walmsley ( Sifive)
>; Anup Patel ; Sagar Kadam
>; rick ; Naoki Hayama
>; Marek Va
Hi Rick,
[]
>> >After add CONFIG_TIMER_EARLY, U-Boot boots ok.
>> >But When I try to booting kernel with FTRACE=1, following are the test
>> >stats:
>> >
>> >ae350_rv64_spl_defconfig without FTRACE=1, kernel booting is ok.
>> >ae350_rv64_spl_defconfig with FTRACE=1, kernel booting fail.
>> >ae
Hi Rick,
>-Original Message-
[...]
>> >After add CONFIG_TIMER_EARLY, U-Boot boots ok.
>> >But When I try to booting kernel with FTRACE=1, following are the test
>> >stats:
>> >
>> >ae350_rv64_spl_defconfig without FTRACE=1, kernel booting is ok.
>> >ae350_rv64_spl_defconfig with FTRACE=1,
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 26 November 2020 14:44
>To: Pragnesh Patel
>Cc: Simon Glass ; U-Boot Mailing List b...@lists.denx.de>; Atish Patra ; Bin Meng
>; Paul Walmsley ( Sifive) ;
>Anup Patel ; Sagar Kadam
>; Palmer Dabbelt ; r
Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers
Signed-off-by: Pragnesh Patel
---
Changes in v2:
- Add test for pwm command
README| 1 +
cmd/Kconfig
>-Original Message-
>From: Tom Rini
>Sent: 23 November 2020 21:22
>To: Pragnesh Patel
>Cc: u-boot@lists.denx.de; atish.pa...@wdc.com; palmerdabb...@google.com;
>bmeng...@gmail.com; Paul Walmsley ( Sifive) ;
>anup.pa...@wdc.com; Sagar Kadam ;
>r...@andestech.com
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 24 November 2020 13:08
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; Bin Meng ; Paul Walmsley (
>Sifive) ; Anup Patel ; Sagar
>Kadam ; Palmer Dabbelt ;
>Simon Glass ; rick ; Alan Kao
>; L
Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers
Signed-off-by: Pragnesh Patel
---
cmd/Kconfig | 6 +++
cmd/Makefile | 1 +
cmd/pwm.
Hi Leo,
>-Original Message-
>From: Leo Liang
>Sent: 23 November 2020 11:28
>To: Pragnesh Patel
>Cc: Rick Chen ; U-Boot Mailing List b...@lists.denx.de>; Atish Patra ;
>palmerdabb...@google.com; Bin Meng ; Paul Walmsley
>( Sifive) ; Anup Patel ; Sagar
>Ka
>-Original Message-
>From: Simon Glass
>Sent: 18 November 2020 20:07
>To: Pragnesh Patel
>Cc: Heinrich Schuchardt ; U-Boot Mailing List b...@lists.denx.de>
>Subject: Re: [PATCH] common/board_r: make sure to call initr_dm() before
>initr_trace()
>
>[Externa
Added support for timer_early_get_count() and timer_early_get_rate()
This is mostly useful in tracing.
Signed-off-by: Pragnesh Patel
---
drivers/timer/andes_plmt_timer.c | 21 -
drivers/timer/riscv_timer.c| 21 -
drivers/timer
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 13 November 2020 13:37
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; palmerdabb...@google.com; Bin Meng
>; Paul Walmsley ( Sifive) ;
>Anup Patel ; Sagar Kadam
>; Sean Anderson ; rick
>; A
Hi,
>-Original Message-
>From: Simon Glass
>Sent: 17 November 2020 05:23
>To: Pragnesh Patel
>Cc: Heinrich Schuchardt ; U-Boot Mailing List b...@lists.denx.de>
>Subject: Re: [PATCH] common/board_r: make sure to call initr_dm() before
>initr_trace()
>
>[Exte
Hi Heinrich,
>-Original Message-
>From: Heinrich Schuchardt
>Sent: 12 November 2020 18:02
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Simon Glass
>
>Subject: Re: [PATCH] common/board_r: make sure to call initr_dm() before
>initr_trace()
>
>[Externa
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 13 November 2020 13:37
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; palmerdabb...@google.com; Bin Meng
>; Paul Walmsley ( Sifive) ;
>Anup Patel ; Sagar Kadam
>; Sean Anderson ; rick
>; A
Enable support for SiFive FU540 Opencores I2C master controller.
Signed-off-by: Pragnesh Patel
Reviewed-by: Rick Chen
---
(no changes since v1)
arch/riscv/cpu/fu540/Kconfig | 2 ++
board/sifive/fu540/Kconfig | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/riscv/cpu/fu540/Kconfig
er for OpenCores I2C controller
+ * (https://opencores.org/projects/i2c)
+ *
+ * (C) Copyright Peter Korsgaard
+ *
+ * Copyright (C) 2020 SiFive, Inc.
+ * Pragnesh Patel
+ *
+ * Support for the GRLIB port of the controller by
+ * Andreas Larsson
+ */
+
+#include
+#include
+#include
+#include
xa9 1
=> i2c md 0x6f 0x20 1
0020: a9.
=> i2c md 0x6f 0x5f 1
005f: a9.
=>
Pragnesh Patel (2):
i2c: ocores: add i2c driver for OpenCores I2C controller
riscv: sifive/fu540: kconfig: Enable support for Opencores I2C
controller
arch/riscv/cpu/fu540/Kconfig | 2 +
board/sifive
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 13 November 2020 12:47
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; palmerdabb...@google.com; Bin Meng
>; Paul Walmsley ( Sifive) ;
>Anup Patel ; Sagar Kadam
>; rick ; Alan Kao
>; Leo Li
>-Original Message-
>From: U-Boot On Behalf Of Pragnesh Patel
>Sent: 12 November 2020 13:06
>To: Heinrich Schuchardt ; Simon Glass
>
>Cc: atish.pa...@wdc.com; palmerdabb...@google.com; u-boot@lists.denx.de;
>bmeng...@gmail.com; Paul Walmsley ( Sifive) ;
>anup.pa
Hi Heinrich,
>-Original Message-
>From: Heinrich Schuchardt
>Sent: 12 November 2020 12:49
>To: Pragnesh Patel ; Simon Glass
>
>Cc: atish.pa...@wdc.com; palmerdabb...@google.com; u-boot@lists.denx.de;
>bmeng...@gmail.com; Paul Walmsley ( Sifive) ;
>anup.pa...@w
Hi Heinrich,
>-Original Message-
>From: Heinrich Schuchardt
>Sent: 12 November 2020 12:44
>To: Simon Glass
>Cc: Pragnesh Patel ; u-boot@lists.denx.de;
>Heinrich Schuchardt
>Subject: [PATCH 1/1] trace: avoid infinite recursion
>
>[External Email] Do not click
Hi Heinrich,
>-Original Message-
>From: Heinrich Schuchardt
>Sent: 11 November 2020 19:18
>To: Pragnesh Patel
>Cc: atish.pa...@wdc.com; palmerdabb...@google.com; u-boot@lists.denx.de;
>bmeng...@gmail.com; Paul Walmsley ( Sifive) ;
>anup.pa...@wdc.com; Sagar Kadam
Hi Heinrich,
>-Original Message-
>From: Heinrich Schuchardt
>Sent: 11 November 2020 16:51
>To: Pragnesh Patel ; u-boot@lists.denx.de
>Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com;
>Paul Walmsley ( Sifive) ; anup.pa...@wdc.com;
>Sagar Kadam
Add timer_get_us() which is useful for tracing.
For S-mode U-Boot, CSR_TIMEH and CSR_TIME will provide
a timer ticks and For M-mode U-Boot, mtime register will
provide the same.
Signed-off-by: Pragnesh Patel
---
Changes in v3:
- Added gd->arch.plmt in global data
- For timer_get_us(), use re
calls (14135744 dropped due to overflow)
19 maximum observed call depth
15 call depth limit
15,633,052 calls not traced due to depth
=>
Pragnesh Patel (1):
riscv: Add timer_get_us() for tracing
arch/riscv/include/asm/global_data.h | 3 +++
drivers/timer
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 10 November 2020 13:17
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; Bin Meng ; Paul Walmsley (
>Sifive) ; Anup Patel ; Sagar
>Kadam ; Simon Glass ; Sean
>Anderson ; palmerdabb...@google.com;
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 09 November 2020 13:44
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; Bin Meng ; Paul Walmsley (
>Sifive) ; Anup Patel ; Sagar
>Kadam ; Simon Glass ; Sean
>Anderson ; palmerdabb...@google.com;
ropped due to overflow)
19 maximum observed call depth
15 call depth limit
9,568,845 calls not traced due to depth
=> trace calls 0x8300 0xf0
Call list dumped to 8300, size 0xea33d0
=>
Pragnesh Patel (1):
riscv: Add timer_get_us() for trac
Add timer_get_us() which is useful for tracing.
For S-mode U-Boot, CSR_TIMEH and CSR_TIME will provide
a timer ticks and For M-mode U-Boot, mtime register will
provide the same.
Signed-off-by: Pragnesh Patel
---
drivers/timer/andes_plmt_timer.c | 16 +++-
drivers/timer
ropped due to overflow)
19 maximum observed call depth
15 call depth limit
9,568,845 calls not traced due to depth
=> trace calls 0x8300 0xf0
Call list dumped to 8300, size 0xea33d0
=>
Pragnesh Patel (1):
riscv: Add timer_get_us() for trac
Add timer_get_us() which is useful for tracing.
For S-mode U-Boot, CSR_TIMEH and CSR_TIME will provide
a timer ticks and For M-mode U-Boot, mtime register will
provide the same.
Signed-off-by: Pragnesh Patel
---
drivers/timer/andes_plmt_timer.c | 16 +++-
drivers/timer
Hi Bin,
>-Original Message-
>From: Rick Chen
>Sent: 21 October 2020 08:58
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; Anup Patel ; Sagar Kadam
>; Bin Meng ; Lukas Auer
>; Sean Anderson ; rick
>; Alan Kao
>Subject: Re: [PATCH 1/3] riscv:
ight Peter Korsgaard
+ *
+ * Copyright (C) 2020 SiFive, Inc.
+ * Pragnesh Patel
+ *
+ * Support for the GRLIB port of the controller by
+ * Andreas Larsson
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* registers */
+#define OCI2
i2c md 0x57 0x2 1
0002: 99.
=> i2c mw 0x57 0x2 0xa9 1
=> i2c md 0x57 0x2 1
0002: a9.
=> i2c md 0x6f 0x20 1
0020: 5aZ
=> i2c md 0x6f 0x5f 1
005f: a5.
=> i2c mw 0x6f 0x20 0xa9 1
=> i2c mw 0x6f 0x5f 0xa9 1
=> i2c md 0x6f 0x20 1
0020: a9.
=> i2c md 0x6f
Enable support for SiFive FU540 Opencores I2C master controller.
Signed-off-by: Pragnesh Patel
---
(no changes since v1)
arch/riscv/cpu/fu540/Kconfig | 2 ++
board/sifive/fu540/Kconfig | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/riscv/cpu/fu540/Kconfig b/arch/riscv/cpu/fu540
Signed-off-by: Pragnesh Patel
---
arch/riscv/dts/fu540-c000-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi
b/arch/riscv/dts/fu540-c000-u-boot.dtsi
index a06e1b11c6..b7cd600b8c 100644
--- a/arch/riscv/dts/fu540-c000-u
Hi Sean,
>-Original Message-
>From: Sean Anderson
>Sent: 09 October 2020 17:58
>To: Pragnesh Patel ; u-boot@lists.denx.de
>Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com;
>Paul Walmsley ( Sifive) ; anup.pa...@wdc.com;
>Sagar Kadam ; r...
55625f
--- /dev/null
+++ b/drivers/i2c/ocores_i2c.c
@@ -0,0 +1,638 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * ocores-i2c.c: I2C bus driver for OpenCores I2C controller
+ * (https://opencores.org/project/i2c/overview)
+ *
+ * (C) Copyright Peter Korsgaard
+ *
+ * Copyright (C) 2020 SiFive, Inc
Enable support for SiFive FU540 Opencores I2C master controller.
Signed-off-by: Pragnesh Patel
---
arch/riscv/cpu/fu540/Kconfig | 2 ++
board/sifive/fu540/Kconfig | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/riscv/cpu/fu540/Kconfig b/arch/riscv/cpu/fu540/Kconfig
index ac3f183342
0 1
0020: 78
=> i2c mw 0x6f 0x5f 0x5a 1
=> i2c md 0x6f 0x5f 1
005f: 5a
=> i2c mw 0x6f 0x5f 0xa5 1
=> i2c md 0x6f 0x5f 1
005f: a5
Pragnesh Patel (2):
i2c: ocores: add i2c driver for OpenCores I2C controller
riscv: sifive/fu540: kconfig: Enable support for Opencores I2C
controller
>-Original Message-
>From: Sean Anderson
>Sent: 29 September 2020 19:49
>To: u-boot@lists.denx.de
>Cc: Bin Meng ; Rick Chen ;
>Heinrich Schuchardt ; Sean Anderson
>; Pragnesh Patel
>Subject: [PATCH 07/10] ram: sifive: Default to y only if compiling for fu540
&g
>-Original Message-
>From: Sean Anderson
>Sent: 01 September 2020 16:02
>To: u-boot@lists.denx.de
>Cc: Rick Chen ; Bin Meng ;
>Pragnesh Patel ; Sean Anderson
>
>Subject: [PATCH v3 7/7] riscv: Update SiFive device tree for new CLINT driver
>
>[Externa
>-Original Message-
>From: Sean Anderson
>Sent: 01 September 2020 16:02
>To: u-boot@lists.denx.de
>Cc: Rick Chen ; Bin Meng ;
>Pragnesh Patel ; Sean Anderson
>
>Subject: [PATCH v3 4/7] riscv: Rework Sifive CLINT as UCLASS_TIMER driver
>
>[External Email] Do
Hi Sean,
>-Original Message-
>From: Sean Anderson
>Sent: 01 September 2020 16:02
>To: u-boot@lists.denx.de
>Cc: Rick Chen ; Bin Meng ;
>Pragnesh Patel ; Sean Anderson
>; Bin Meng ; Anup Patel
>
>Subject: [PATCH v3 1/7] riscv: Rework riscv timer driver to only
For RISC-V arch, no need for CMD_IRQ so disable the same.
Signed-off-by: Pragnesh Patel
---
cmd/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 9ad511aa17..9709666261 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -2217,7 +2217,7
For M-mode U-boot, andes_plmt_get_count() will provide timer counter.
Mark it as 'notrace' so that it doesn't cause infinite recursion.
Signed-off-by: Pragnesh Patel
---
arch/riscv/lib/andes_plmt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/lib
unction sites
37,057,350 function calls
1 untracked function calls
1,279,612 traced function calls (36015585 dropped due to overflow)
19 maximum observed call depth
15 call depth limit
37,055,565 calls not traced due to depth
=>
Pragnesh Patel (
Mark them as 'notrace' so that it doesn't cause infinite recursion.
Signed-off-by: Pragnesh Patel
---
arch/riscv/lib/sifive_clint.c | 2 +-
drivers/timer/riscv_timer.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/lib/sifive_clint.c b
timer_get_us() will use timer_ops->get_count() function for timer counter.
For S-mode U-Boot, CSR_TIMEH and CSR_TIME will provide a timer counter and
For M-mode U-Boot, mtime register will provide the same.
Signed-off-by: Pragnesh Patel
---
arch/riscv/lib/Makefile | 1 +
arch/riscv/lib/time
Hi Heinrich,
>-Original Message-
>From: Heinrich Schuchardt
>Sent: 24 August 2020 19:01
>To: Pragnesh Patel ; u-boot@lists.denx.de;
>atish.pa...@wdc.com; bmeng...@gmail.com; anup.pa...@wdc.com; Sagar
>Kadam ; r...@andestech.com
>Cc: Paul Walmsley ( Sifive) ; Simon G
Right now, do_irqinfo() done nothing and return 0 for
CONFIG_CMD_IRQ
Signed-off-by: Pragnesh Patel
---
arch/riscv/lib/interrupts.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c
index cd47e64487..d6273606b5 100644
--- a/arch
>-Original Message-
>From: Heinrich Schuchardt
>Sent: 20 August 2020 23:14
>To: Rick Chen
>Cc: Bin Meng ; Pragnesh Patel
>; Lukas Auer ; Atish Patra
>; u-boot@lists.denx.de; Heinrich Schuchardt
>; Bin Meng
>Subject: [PATCH v5 1/1] cmd: provide command sbi
t")
>Signed-off-by: Heinrich Schuchardt
>Reviewed-by: Bin Meng
>Reviewed-by: Simon Glass
>Reviewed-by: Rick Chen
>---
>v2:
>Do not break Fixes line
>---
> arch/riscv/lib/spl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Pragnesh Patel
>-Original Message-
>From: Bin Meng
>Sent: 18 August 2020 13:39
>To: Rick Chen ; Pragnesh Patel
>; U-Boot Mailing List
>Cc: Bin Meng
>Subject: [PATCH 2/2] ram: sifive: Fix compiler warnings for 32-bit
>
>[External Email] Do not click links or attachments unles
Hi Heinrich,
>-Original Message-
>From: Heinrich Schuchardt
>Sent: 20 August 2020 17:25
>To: Pragnesh Patel
>Cc: Bin Meng ; Lukas Auer ; Atish Patra
>; u-boot@lists.denx.de; Bin Meng
>; Rick Chen
>Subject: Re: [PATCH v4 1/1] cmd: provide command sbi
>
>
>-Original Message-
>From: Bin Meng
>Sent: 18 August 2020 13:39
>To: Rick Chen ; Pragnesh Patel
>; U-Boot Mailing List
>Cc: Bin Meng
>Subject: [PATCH 1/2] riscv: fu540: Use correct API to get L2 cache controller
>base
>address
>
>[External Email]
Hi Heinrich,
>-Original Message-
>From: Pragnesh Patel
>Sent: 20 August 2020 17:00
>To: 'Heinrich Schuchardt'
>Cc: Bin Meng ; Lukas Auer ; Atish Patra
>; u-boot@lists.denx.de; Bin Meng
>; Rick Chen
>Subject: RE: [PATCH v4 1/1] cmd: provide command sbi
Hi Heinrich,
>-Original Message-
>From: Heinrich Schuchardt
>Sent: 20 August 2020 16:23
>To: Rick Chen
>Cc: Bin Meng ; Pragnesh Patel
>; Lukas Auer ; Atish Patra
>; u-boot@lists.denx.de; Heinrich Schuchardt
>; Bin Meng
>Subject: [PATCH v4 1/1] cmd: provi
>-Original Message-
>From: Heinrich Schuchardt
>Sent: 20 August 2020 16:23
>To: Rick Chen
>Cc: Bin Meng ; Pragnesh Patel
>; Lukas Auer ; Atish Patra
>; u-boot@lists.denx.de; Heinrich Schuchardt
>; Bin Meng
>Subject: [PATCH v4 1/1] cmd: provide command sbi
t;)
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
Reviewed-by: Atish Patra
---
Changes in v3:
- Rebase on master
Changes in v2:
- Add Fixes tag
common/board_f.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/common/board_f.c b/common/
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 13 August 2020 08:59
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; Bin Meng ; Anup Patel
>; Sagar Kadam ; Paul
>Walmsley ( Sifive) ; Simon Glass
>; ovpan...@gmail.com; swar...@nvidia.com; ric
Hi Atish,
>-Original Message-
>From: Atish Patra
>Sent: 10 August 2020 01:51
>To: Pragnesh Patel
>Cc: Atish Patra ; Bin Meng ; U-
>Boot Mailing List ; Anup Patel ;
>Sagar Kadam ; Rick Chen ;
>Paul Walmsley ( Sifive) ; Simon Glass
>; Ovidiu Panait ; Stephen
Hi Bin,
>-Original Message-
>From: Bin Meng
>Sent: 06 August 2020 13:43
>To: Pragnesh Patel
>Cc: Rick Chen ; U-Boot Mailing List b...@lists.denx.de>; Atish Patra ; Anup Patel
>; Sagar Kadam ; Paul
>Walmsley ( Sifive) ; Simon Glass
>; ovpan...@gm
t;)
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
common/board_f.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index 88ff0424a7..7ae01e9fff 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@
>-Original Message-
>From: Bin Meng
>Sent: 03 August 2020 11:39
>To: Rick Chen ; Pragnesh Patel
>; U-Boot Mailing List
>Cc: Bin Meng
>Subject: [PATCH 6/6] riscv: sifive/fu540: Move SPL related functions to spl.c
>
>[External Email] Do not click links or attac
>-Original Message-
>From: Bin Meng
>Sent: 03 August 2020 11:39
>To: Rick Chen ; Pragnesh Patel
>; U-Boot Mailing List
>Cc: Bin Meng
>Subject: [PATCH 5/6] riscv: sifive/fu540: Drop NET_RANDOM_ETHADDR
>
>[External Email] Do not click links or attachments unles
>-Original Message-
>From: Bin Meng
>Sent: 03 August 2020 11:39
>To: Rick Chen ; Pragnesh Patel
>; U-Boot Mailing List
>Cc: Bin Meng
>Subject: [PATCH 4/6] riscv: sifive/fu540: kconfig: Move FU540 driver related
>options to the SoC level
>
>[Externa
>-Original Message-
>From: Bin Meng
>Sent: 03 August 2020 11:39
>To: Rick Chen ; Pragnesh Patel
>; U-Boot Mailing List
>Cc: Bin Meng
>Subject: [PATCH 3/6] riscv: sifive/fu540: spl: Rename soc_spl_init()
>
>[External Email] Do not click links or attachmen
>-Original Message-
>From: Bin Meng
>Sent: 03 August 2020 11:39
>To: Rick Chen ; Pragnesh Patel
>; U-Boot Mailing List
>Cc: Bin Meng
>Subject: [PATCH 2/6] riscv: sifive/fu540: spl: Drop our own version of
>board_init_f()
>
>[External Email] Do not click l
>-Original Message-
>From: Bin Meng
>Sent: 03 August 2020 11:39
>To: Rick Chen ; Pragnesh Patel
>; U-Boot Mailing List
>Cc: Bin Meng
>Subject: [PATCH 1/6] riscv: Call spl_board_init_f() in the generic SPL
>board_init_f()
>
>[External Email] Do not click l
Hi Rick,
>-Original Message-
>From: Rick Chen
>Sent: 06 August 2020 08:22
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; Bin Meng ; Anup Patel
>; Sagar Kadam ; Paul
>Walmsley ( Sifive) ; Simon Glass
>; ovpan...@gmail.com; swar...@nvidia.co
Hi Atish,
I just sent a patch to solve this issue.
https://patchwork.ozlabs.org/project/uboot/patch/20200805090053.11805-1-pragnesh.pa...@sifive.com/
Thanks,
Pragnesh
>-Original Message-
>From: U-Boot On Behalf Of Pragnesh Patel
>Sent: 04 August 2020 20:03
>To: Atish Patr
There may be a chance that board specific fix_fdt() will change the
size of FDT blob so it's safe to call reserve_fdt() after fix_fdt()
otherwise global data (gd) will overwrite with FDT blob values.
Signed-off-by: Pragnesh Patel
---
common/board_f.c | 6 +++---
1 file changed, 3 inser
Hi Atish,
>-Original Message-
>From: U-Boot On Behalf Of Pragnesh Patel
>Sent: 04 August 2020 19:55
>To: Atish Patra ; Bin Meng ;
>Rick Chen
>Cc: Anup Patel ; Lukas Auer
>; U-Boot Mailing List
>Subject: RE: master u-boot broken for HiFive Unleashed
>
>Hi A
ed results.
>-Original Message-
>From: Atish Patra
>Sent: 30 July 2020 03:13
>To: U-Boot Mailing List ; Bin Meng
>; Rick Chen
>Cc: Anup Patel ; Lukas Auer
>; Pragnesh Patel
>Subject: master u-boot broken for HiFive Unleashed
>
>[External Email] Do not click l
>-Original Message-
>From: Heinrich Schuchardt
>Sent: 04 August 2020 02:40
>To: Rick Chen
>Cc: Pragnesh Patel ; Bin Meng
>; u-boot@lists.denx.de; Heinrich Schuchardt
>
>Subject: [PATCH 1/1] riscv: sifive: fu540: redundant initialization
>
>[Externa
Hi Sean,
>-Original Message-
>From: Sean Anderson
>Sent: 23 July 2020 19:27
>To: Bin Meng ; Pragnesh Patel
>; Sagar Kadam
>Cc: U-Boot Mailing List ; Rick Chen
>
>Subject: Re: [PATCH 6/6] riscv: Update SiFive device tree for new CLINT driver
>
>[Externa
>-Original Message-
>From: Sagar Kadam
>Sent: 10 July 2020 14:08
>To: u-boot@lists.denx.de
>Cc: r...@andestech.com; Paul Walmsley ( Sifive)
>; pal...@dabbelt.com; anup.pa...@wdc.com;
>atish.pa...@wdc.com; lu...@denx.de; Pragnesh Patel
>; bin.m...@windriver.com;
>
>-Original Message-
>From: Sagar Kadam
>Sent: 10 July 2020 14:08
>To: u-boot@lists.denx.de
>Cc: r...@andestech.com; Paul Walmsley ( Sifive)
>; pal...@dabbelt.com; anup.pa...@wdc.com;
>atish.pa...@wdc.com; lu...@denx.de; Pragnesh Patel
>; bin.m...@windriver.com;
>
>-Original Message-
>From: Sagar Kadam
>Sent: 10 July 2020 14:08
>To: u-boot@lists.denx.de
>Cc: r...@andestech.com; Paul Walmsley ( Sifive)
>; pal...@dabbelt.com; anup.pa...@wdc.com;
>atish.pa...@wdc.com; lu...@denx.de; Pragnesh Patel
>; bin.m...@windriver.com;
>
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