On 6/27/24 09:06, Andre Przywara wrote:
On Thu, 8 Jun 2023 13:56:31 -0600
Sam Edwards wrote:
Hi,
John asked me have a look at this.
Hi Andre, it's good to hear from you again,
I'd first like to make sure you're aware that the date on this patch is
June *2023,* not June 2024. It's
, as it causes confusion among downstream users as to
whether the SPI image needs to be distributed.
Fixes: 153ac950a599 ("board: rockchip: Add the Turing RK1 SoM")
Suggested-by: Florian Klink
Signed-off-by: Sam Edwards
Acked-by: Joshua Riek
Reviewed-by: Jonas Karlman
---
Changes v1->v2 (b
, as it causes confusion among downstream users as to
whether the SPI image needs to be distributed.
Fixes: 153ac950a599 ("board: rockchip: Add the Turing RK1 SoM")
Suggested-by: Florian Klink
Signed-off-by: Sam Edwards
Acked-by: Joshua Riek
Reviewed-by: Jonas Karlman
---
Changes v1->v2 (b
, as it causes confusion among downstream users as to
whether the SPI image needs to be distributed.
Fixes: 153ac950a599 ("board: rockchip: Add the Turing RK1 SoM")
Suggested-by: Florian Klink
Signed-off-by: Sam Edwards
Acked-by: Joshua Riek
Reviewed-by: Jonas Karlman
---
Changes v1->v2 (b
, as it causes confusion among downstream users as to
whether the SPI image needs to be distributed.
Fixes: 153ac950a599 ("board: rockchip: Add the Turing RK1 SoM")
Suggested-by: Florian Klink
Signed-off-by: Sam Edwards
Acked-by: Joshua Riek
---
configs/turing-rk1-rk3588_defconfig | 6
On Wed, Apr 10, 2024 at 10:26 PM John Watts wrote:
>
> This series is my current working and tested setup for booting from
> SPI NAND chips on the Allwinner T113.
>
> I have included the following patches from others. I may have modified
> them to work with the latest mainline:
>
>
On Thu, Apr 11, 2024 at 1:29 AM Florian Klink wrote:
>
> On 23-12-14 18:46:47, Joshua Riek wrote:
> >The Turing RK1 is a Rockchip RK3588 based SoM from Turing Machines.
> >
> >Specifications:
> >
> >Rockchip RK3588 SoC
> >4x ARM Cortex-A76, 4x ARM Cortex-A55
> >8/16/32GB memory
On Thu, Apr 11, 2024 at 1:40 AM John Watts wrote:
>
> On Thu, Apr 11, 2024 at 12:52:14AM -0600, Sam Edwards wrote:
> > Hi John,
> >
> > This patch was developed against (and used very heavily on) the Turing
> > Pi 2, which has an Allwinner T113-s3 SoC. Likely it s
"CONFIG_SPL_BSS_START_ADDR must be 8-byte aligned");
+
Git complains about this added blank line at the end of the file. (My
personal preference would be a blank line before the ASSERT, if the
ASSERT is truly necessary.)
But beyond that:
Tested-by: Sam Edwards # Binary output identical
Still
On 3/6/24 06:23, Ilias Apalodimas wrote:
On Wed, 6 Mar 2024 at 12:37, Ilias Apalodimas
wrote:
On Wed, 6 Mar 2024 at 11:35, Ilias Apalodimas
wrote:
Hi Sam,
On Wed, 6 Mar 2024 at 10:22, Sam Edwards wrote:
On 3/4/24 02:01, Ilias Apalodimas wrote:
image_copy_start/end are defined as c
On 3/6/24 02:13, Ilias Apalodimas wrote:
Hi Sam,
Again thank you for the elaborate review. This really helps a lot.
On Wed, 6 Mar 2024 at 10:14, Sam Edwards wrote:
On 3/4/24 02:01, Ilias Apalodimas wrote:
__efi_runtime_start/end are defined as c variables for arm7 only in
order
, the
variable definitions from sections.c and define them as a symbols within
a section.
Signed-off-by: Ilias Apalodimas
Tested-by: Sam Edwards # Binary output identical
Since the __image_copy_* symbols are marking boundaries in the whole
image as opposed to a single section, I'd find it clearer
it as a symbol.
So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
the correct section.
Signed-off-by: Ilias Apalodimas
Tested-by: Sam Edwards # Binary output identical
Thanks for the cleanup,
Sam
---
arch/arm
since 2016 [1]
[0] https://ftp.gnu.org/old-gnu/Manuals/ld-2.9.1/html_mono/ld.html#SEC13
[1] commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared
object")
Signed-off-by: Ilias Apalodimas
Reviewed-by: Sam Edwards
Tested-by: Sam Edwards # Binary output identical
Th
it as a symbol.
So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
the correct section.
Signed-off-by: Ilias Apalodimas
Reviewed-by: Sam Edwards
Tested-by: Sam Edwards # Binary output identical
Thanks
On 3/4/24 02:01, Ilias Apalodimas wrote:
commit 3ebd1cbc49f0 ("arm: make __bss_start and __bss_end__ compiler-generated")
and
commit f84a7b8f54db ("ARM: Fix __bss_start and __bss_end in linker scripts")
were moving the bss_start/end on c generated variables that were
injected in their own
On 2/28/24 04:15, Ilias Apalodimas wrote:
On Wed, 28 Feb 2024 at 13:11, Peter Robinson wrote:
On Wed, 28 Feb 2024 at 10:58, Ilias Apalodimas
wrote:
The arm linker scripts had a mix of symbols and C defined variables in an
effort to emit relative references instead of absolute ones e.g
Hi Joshua,
I just updated my own modules to this version of the patch and all
continues to be well.
On 12/14/23 16:46, Joshua Riek wrote:
Signed-off-by: Joshua Riek
Cc: Sam Edwards
Tested-by: Sam Edwards
Thanks for the continued efforts, my friend!
Happy Friday,
Sam
in
practice means it reads the whole file in one exact-filesize chunk.
So, to answer your questions: "either/both depending on platform."
(The bug in the U-Boot implementation doubtlessly affects more than just
EFI; I only happened to discover it while trying to use EFI.)
Signed-off-by: S
nitrd= via
'bootefi' from a btrfs partition. The EFI stub entered an infinite
loop of zero-length reads while trying to read the initrd, and the
boot process stalled indefinitely.
Signed-off-by: Sam Edwards
---
fs/btrfs/btrfs.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
This patch adds the necessary code to make nonsec booting and PSCI
secondary core management functional on the R528/T113.
Signed-off-by: Sam Edwards
Tested-by: Maksim Kiselev
Tested-by: Kevin Amadiva
---
arch/arm/cpu/armv7/Kconfig | 3 ++-
arch/arm/cpu/armv7/sunxi/psci.c | 47
same logic.
Signed-off-by: Sam Edwards
Reviewed-by: Andre Przywara
---
arch/arm/cpu/armv7/sunxi/psci.c | 66 +++--
1 file changed, 47 insertions(+), 19 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 69fa3f3c2
and its associated header file existed only to support
PSCI code, so also delete them altogether.
Signed-off-by: Sam Edwards
---
arch/arm/cpu/armv7/sunxi/psci.c | 57
arch/arm/include/asm/arch-sunxi/cpucfg.h | 67
2 files changed, 23 insertions
es instead.
There are no functional changes here.
Signed-off-by: Sam Edwards
Reviewed-by: Andre Przywara
---
arch/arm/cpu/armv7/sunxi/psci.c | 103 +---
1 file changed, 43 insertions(+), 60 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/ps
l into sunxi_cpu_set_power().
- Removed unnecessary H6 special-case, since H6 is actually ARM64.
- Renamed SUNXI_CPUX_BASE to SUNXI_CPUCFG_BASE, to mirror expected changes in
Andre's v2 of the R528 series (we decided against using a new name for this
block).
- Removed sunxi_cpucfg_reg struct, and stoppe
Reviewed-by: Sam Edwards
Cheers,
Sam
---
disk/part.c | 55 +
1 file changed, 55 insertions(+)
diff --git a/disk/part.c b/disk/part.c
index a4b6d265da..7c995f583c 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -14,6 +14,9 @@
#include
#include
#include
+#include
+#include
lain
"Bad device specification" and does not suggest using ubifsmount.
Signed-off-by: Sam Edwards
---
disk/part.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/disk/part.c b/disk/part.c
index 72241b7b23..a4b6d265da 100644
--- a/disk/
the parent for the BLK devices that represent the static volumes.
Signed-off-by: Sam Edwards
---
cmd/ubi.c| 11 ++
drivers/mtd/ubi/Makefile | 1 +
drivers/mtd/ubi/ubi-uclass.c | 74
include/dm/uclass-id.h | 1 +
include/ubi_uboot.h
This makes static UBI volumes readable as block devices, however
no mechanism for selecting these volume devices yet exists.
Signed-off-by: Sam Edwards
---
drivers/mtd/ubi/ubi-uclass.c | 111 +++
1 file changed, 111 insertions(+)
diff --git a/drivers/mtd/ubi/ubi
ndex/volume numbers with `dectoul` instead of `hextoul`, to match
Linux's behavior of treating these numbers as decimal.
- Do not treat a valid decimal number as a volume name, even if the volume ID
doesn't exist, to match Linux's behavior of always treating decimal numbers
as volume IDs.
Cheer
This patch adds the necessary code to make nonsec booting and PSCI
secondary core management functional on the R528/T113.
Signed-off-by: Sam Edwards
Tested-by: Maksim Kiselev
Tested-by: Kevin Amadiva
---
arch/arm/cpu/armv7/sunxi/psci.c | 47 -
arch/arm/mach
and its associated header file existed only to support
PSCI code, so also delete them altogether.
Signed-off-by: Sam Edwards
---
arch/arm/cpu/armv7/sunxi/psci.c | 57
arch/arm/include/asm/arch-sunxi/cpucfg.h | 67
2 files changed, 23 insertions
same logic.
Signed-off-by: Sam Edwards
Reviewed-by: Andre Przywara
---
arch/arm/cpu/armv7/sunxi/psci.c | 66 +++--
1 file changed, 47 insertions(+), 19 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 69fa3f3c2
es instead.
There are no functional changes here.
Signed-off-by: Sam Edwards
Reviewed-by: Andre Przywara
---
arch/arm/cpu/armv7/sunxi/psci.c | 103 +---
1 file changed, 43 insertions(+), 60 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/ps
SUNXI_CPUX_BASE to SUNXI_CPUCFG_BASE, to mirror expected changes in
Andre's v2 of the R528 series (we decided against using a new name for this
block).
- Removed sunxi_cpucfg_reg struct, and stopped using the PRCM struct in psci.c.
Happy Saturday all,
Sam
Sam Edwards (4):
sunxi: psci: clean aw
On 9/27/23 10:31, Andre Przywara wrote:
On Wed, 16 Aug 2023 10:34:19 -0700
Sam Edwards wrote:
Hi Sam,
Hi Andre,
@@ -103,10 +116,13 @@ static void __secure clamp_set(u32 *clamp)
static void __secure sunxi_cpu_set_entry(int __always_unused cpu, void *entry)
{
- /* secondary
On 9/27/23 10:34, Andre Przywara wrote:
In the majority of cases, there are no changes to the text section
introduced by this patch. In the R40 case, there's a small change where
the compiler adds a NULL check onto the result of the `(void *)cpucfg +
SUN8I_R40_PWR_CLAMP(cpu)` computation, which
On 9/27/23 10:32, Andre Przywara wrote:
On Wed, 16 Aug 2023 10:34:20 -0700
Sam Edwards wrote:
Hi Sam,
Hi Andre,
Mmh, I didn't find a better solution than keeping this in.
I'll keep it if your R528 v2 doesn't find some other way to address it.
+#endif
+#if defined(SUNXI_CPUX_BASE
Hi Heiko and Simon,
Thought I'd follow-up to keep this discussion going. The main thing I
would like to decide first (as it lets me start relying on it in boot
scripts) would be the UBI access syntax:
=> ls ubi 0:rootfs /boot
=> ls ubi 0:2 /boot
Do those look good? Should I be trying to
On 8/26/23 04:22, Marc Zyngier wrote:
Hi Marc!
The GIC definitely has the NS bit routed to it. Otherwise, the secure
configuration would just be an utter joke. Just try it.
Thank you for your response. I'd like to revisit my prior point about
the distinction between the NS bit and AxPROT[1]
On 8/25/23 00:20, Chen-Yu Tsai wrote:
Hi Chen-Yu,
IIRC the GIC manual says that the secure bit is set or cleared to select
which bank of registers is accessed.
Which secure bit are we talking about here? Do we mean the *configured*
secure bit (SCR.NS, what the code is attempting to clear)
On 8/18/23 07:27, Andre Przywara wrote:
Hi Andre,
So instead of trying to derive some pattern from where there is none, I'd
rather do: config SUNXI_CPU_HOTPLUG_ADDRESS
hex
default 0x01c000bc if MACH_SUN8I_R40
But the hotplug flag register is at 0x01c000b8 for R40?
On 8/18/23 10:40, Sam Edwards wrote:
On 8/18/23 07:11, Andre Przywara wrote:
Hi Andre,
The resulting object file is different (8 byte larger,
even), so it's hard to prove
I'm no stranger to reading object code. Since the output should be
identical in principle, I'll spend a little bit
what's changing. If it's easy enough, I'd like to adjust
my patch so that the optimizer does produce the same output. (Keep in
mind I'm on Clang, though. If Clang already gives the same output for
both, I'll just report back to use that when comparing.)
Signed-off-by: Sam Edwards
Reviewed
On 8/18/23 07:57, Andre Przywara wrote:
On Wed, 16 Aug 2023 10:34:17 -0700
Sam Edwards wrote:
Hi Sam,
Likewise Andre,
-static void __secure sunxi_set_entry_address(void *entry)
+static void __secure sunxi_cpu_set_entry(int __always_unused cpu, void *entry)
So what is the reasoning behind
ot 3 of a Turing Pi 2
cluster board.
[1]: https://lore.kernel.org/all/20230428223500.23337-1-jim2101...@gmail.com/
Signed-off-by: Sam Edwards
---
drivers/pci/pcie_brcmstb.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pc
This is a hack for reviewer QoL. It is not being submitted for mainline
inclusion.
---
arch/arm/cpu/armv7/sunxi/psci.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index b4ce4f6def..27bac291d5 100644
---
This patch adds the necessary code to make nonsec booting and PSCI
secondary core management functional on the R528/T113.
Signed-off-by: Sam Edwards
Tested-by: Maksim Kiselev
---
arch/arm/cpu/armv7/sunxi/psci.c | 48 -
arch/arm/mach-sunxi/Kconfig | 2
and its associated header file existed only to support
PSCI code, so also delete them altogether.
Signed-off-by: Sam Edwards
---
arch/arm/cpu/armv7/sunxi/psci.c | 57
arch/arm/include/asm/arch-sunxi/cpucfg.h | 67
2 files changed, 23 insertions
same logic.
Signed-off-by: Sam Edwards
---
arch/arm/cpu/armv7/sunxi/psci.c | 66 +++--
1 file changed, 47 insertions(+), 19 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 7804e0933b..e2845f21ab 100644
--- a/arch
es instead.
There are no functional changes here.
Signed-off-by: Sam Edwards
---
arch/arm/cpu/armv7/sunxi/psci.c | 102 +---
1 file changed, 42 insertions(+), 60 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index e1d3638b5c..7804e09
uct in psci.c.
Cheers,
Sam
Sam Edwards (5):
sunxi: psci: clean away preprocessor macros
sunxi: psci: refactor register access to separate functions
sunxi: psci: stop modeling register layout with C structs
sunxi: psci: implement PSCI on R528
HACK: sunxi: psci: be compatible with v1 of
On 8/15/23 15:59, Andre Przywara wrote:
Hi Sam,
Hi Andre,
So that's a bit more nasty indeed. I don't even know if R_CPUCFG really
makes sense here, as the _R_ term typically refers to the management
processor, which the D1/R528 don't have. Or at least the always-on power
domain, but then
On 8/14/23 08:16, Andre Przywara wrote:
Hi Sam,
This patch adds the necessary code to make nonsec booting and PSCI
secondary core management functional on the R528/T113.
Unfortunately this patch breaks the build on older 32-bit SoCs, as
SUNXI_CPUX_BASE is not defined there. That's a typical
interrupt which will crash U-Boot.
- Wait for the recommended 100ms after PERST# is deasserted.
I sent this patch while debugging a crash involving PCIe, but these
are unrelated improvements. I do not believe that this patch fixes any
real-world bug.
Signed-off-by: Sam Edwards
---
drivers/pci
On 8/14/23 15:05, Andre Przywara wrote:
Yes, I will add this to the header file, either defined as 0, or to its
actual address.
Gotcha; my v2 will also assume you've taken care of merging these guys:
+#define SUNXI_CPUX_BASE0x0901
+#define SUNXI_CPUCFG_BASE
On 8/14/23 08:06, Andre Przywara wrote:
Hi Sam,
many many thanks for sending this, I especially like your clean up around
the #ifdef's!
The patches looks good on the first glance (apart from some regression in
patch 3/3), but I will reply to them individually.
Cheers,
Andre
Thanks for your
Hi Andre,
On 8/14/23 10:37, Andre Przywara wrote:
So I think we can get rid of this:
- GEN_H6 never compiles this code here, as both H6 and H616 are arm64.
Easy!
- We can define SUNXI_PRCM_BASE for NCAT2, I believe Samuel once
mentioned that the D1/T113 does have such a block, actually.
This patch adds the necessary code to make nonsec booting and PSCI
secondary core management functional on the R528/T113.
Signed-off-by: Sam Edwards
Tested-by: Maksim Kiselev
---
arch/arm/cpu/armv7/sunxi/psci.c | 47 -
arch/arm/mach-sunxi/Kconfig | 2
same logic.
Signed-off-by: Sam Edwards
---
arch/arm/cpu/armv7/sunxi/psci.c | 66 +++--
1 file changed, 47 insertions(+), 19 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 7809b074f8..94120e7526 100644
--- a/arch
es instead.
There are no functional changes here.
Signed-off-by: Sam Edwards
---
arch/arm/cpu/armv7/sunxi/psci.c | 94 ++---
1 file changed, 41 insertions(+), 53 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index e1d3638b5c..7809b07
,
Sam
Sam Edwards (3):
sunxi: psci: clean away preprocessor macros
sunxi: psci: refactor register access to separate functions
sunxi: psci: implement PSCI on R528
arch/arm/cpu/armv7/sunxi/psci.c | 185 +---
arch/arm/mach-sunxi/Kconfig | 2 +
include/configs
---
disk/part.c | 56 +
1 file changed, 56 insertions(+)
diff --git a/disk/part.c b/disk/part.c
index 1ad8277b65..85eb51429a 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -14,6 +14,9 @@
#include
#include
#include
+#include
+#include
lain
"Bad device specification" and does not suggest using ubifsmount.
Signed-off-by: Sam Edwards
---
disk/part.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/disk/part.c b/disk/part.c
index 0a03b8213d..1ad8277b65 100644
--- a/disk/
This makes static UBI volumes readable as block devices, however
no mechanism for selecting these volume devices yet exists.
Signed-off-by: Sam Edwards
---
drivers/mtd/ubi/ubi-uclass.c | 110 +++
1 file changed, 110 insertions(+)
diff --git a/drivers/mtd/ubi/ubi
the parent for the BLK devices that represent the static volumes.
Signed-off-by: Sam Edwards
---
cmd/ubi.c| 11 ++
drivers/mtd/ubi/Makefile | 1 +
drivers/mtd/ubi/ubi-uclass.c | 74
include/dm/uclass-id.h | 1 +
include/ubi_uboot.h
for static UBI volumes?
4) Does my choose_blksz_for_volume() function make sense, or should I always be
using a preferred block size (like 512) if possible?
Cheers,
Sam
Sam Edwards (4):
mtd: ubi: register UBI attachments as DM devices
mtd: ubi: bind block device driver for static volumes
disk:
On 7/21/23 07:45, Andre Przywara wrote:
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index fc80fe50b14..c6115112688 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -748,6 +748,28 @@ static const
his
in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog,
so that the generic reset driver will work.
Signed-off-by: Andre Przywara
Reviewed-by: Sam Edwards
Tested-by: Sam Edwards
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index af419c7e590..a
controller).
This paves the way to introduce a first user of this generation.
Signed-off-by: Andre Przywara
Reviewed-by: Sam Edwards
Tested-by: Sam Edwards
Thanks,
Sam
Reviewed-by: Sam Edwards
Tested-by: Sam Edwards
Thanks,
Sam
abstract the new D1 pinctrl more easily.
Signed-off-by: Andre Przywara
Reviewed-by: Sam Edwards
Tested-by: Sam Edwards
Thanks,
Sam
Then drop the current code
from board.c, which was doing that job before.
This allows us to remove the MACPWR Kconfig definition and the respective
values from the defconfigs.
Signed-off-by: Andre Przywara
Reviewed-by: Sam Edwards
Thanks,
Sam
Signed-off-by: Andre Przywara
Reviewed-by: Sam Edwards
Thanks,
Sam
I've had countless successful boots of a T113-s3 using this DRAM
controller code, so:
On 7/21/23 07:46, Andre Przywara wrote:
Signed-off-by: Andre Przywara
Tested-by: Sam Edwards
Thanks greatly for the speedy turnaround on this patch!
On 7/25/23 22:56, Yifan Zhao wrote:
Fixes: 3a21e92fc255 ("fs/erofs: Introduce new features including ztailpacking,
fragments and dedupe")
Signed-off-by: Yifan Zhao
Tested-by: Sam Edwards
{
debug("%s: Failed to probe (err=%d)\n", __func__, ret);
Love these sorts of clean-ups. I don't have a sunxi with SATA so I can't
test it, but I've been running my target on this patch in some form or
another for several weeks, and the code looks good, so:
Reviewed-by: Sam Edwards
is found to be held low, in an attempt to force the bus back to
an idle state. This patch only resets the controller in case something
else had previously upset it, and (in principle) results in no
externally-observable change in behavior.
Signed-off-by: Sam Edwards
---
drive
Hi folks,
On 7/7/23 09:52, Yifan Zhao wrote:
diff --git a/fs/erofs/internal.h b/fs/erofs/internal.h
index 4af7c91560..433a3c6c1e 100644
--- a/fs/erofs/internal.h
+++ b/fs/erofs/internal.h
+/* make sure that any user of the erofs headers has at least 64bit off_t type
*/
+extern int
Hi Andre,
Series looks good so far! I'm trying to move my testing build over to it
now; I will report back when I've been running on it for a little bit.
On 7/21/23 07:45, Andre Przywara wrote:
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 7ac50c4ae8c..2db4a2d73ca 100644
---
On 6/21/23 04:55, Andre Przywara wrote:
On Tue, 20 Jun 2023 16:11:48 -0600
Sam Edwards wrote:
Hi Sam,
pleasure to write with you ;-)
Hi Andre,
Likewise!
Well, so this is actually the fallback implementation which should
somewhat work on most SoCs: set a flag, reset, and catch the flag
Hi Andre,
On 6/20/23 06:42, Andre Przywara wrote:
So yeah, the request of a "Enter FEL" command came up multiple times, but
so far no one could be bothered to implement this properly. The idea would
be to have a generic command (more like "fel-reset" than efex), and
allow each SoC (family) to
parts, as well as the regular USB HCI host PHYs.
config INITIAL_USB_SCAN_DELAY
int "Delay initial USB scan by x ms to allow builtin devices to init"
This does result in PHY_USB_SUN4I being enabled by default, so I guess:
Tested-by: Sam Edwards
However, it
Hi Andre,
On 6/14/23 18:07, Andre Przywara wrote:
So I finally found some time to address some issues in the series,
especially in the first patches (pinctrl rework and preparation).
I pushed a branch to https://github.com/apritzel/u-boot/commits/r528-rc
I need to do more testing, most
Hi again Icenowy,
On 6/6/23 17:09, Sam Edwards wrote:
Still, I believe it's sensible that, when we know for sure we're coming
from SPI-NAND (because it's a newer sunxi that reports 0x04, or we know
from the suniv stack-checking hack), we should call that its own SPL
load method, which does
this initialization being about configuring a FIFO has
pretty much been debunked for years now.
Signed-off-by: Sam Edwards
Reviewed-by: Andre Przywara
---
drivers/usb/musb-new/sunxi.c | 31 ++-
1 file changed, 22 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/musb-new
Only the older (ca. A10, A20) sunxis need this poke for the MUSB to
function. Mimic the Linux kernel and add a `has_sram` flag to the config
structure that is only set for the specific compatibles that require
this initialization.
Signed-off-by: Sam Edwards
Reviewed-by: Andre Przywara
Tested
Hi list,
Only change from v4 is that I reworded the commit message in 2/2 not to mention
the TODO comment block that I removed in v3.
Cheers,
Sam
Sam Edwards (2):
usb: musb-new: sunxi: only perform SRAM initialization when necessary
usb: musb-new: sunxi: clarify the purpose of SRAM
Hey Andre,
On 6/11/23 18:20, Andre Przywara wrote:
Thanks for the update and the list! Can you confirm where you
still needed code changes compared to say my github branch plus the
changes we already discussed? Trying some guesses below, please confirm
or deny:
Pretyyy much everything
Hey there Heiko,
On 6/12/23 06:35, Heiko Schocher wrote:
I have not the deep knowledge of this specific i2c driver, but may
also an option is to set
int (*deblock)(struct udevice *bus);
in
static const struct dm_i2c_ops mvtwsi_i2c_ops = {
for this driver and do there the stuff needed to
this initialization being about configuring a FIFO has
pretty much been debunked for years now.
This cleanup also adds a TODO comment about runtime discovery
of the SYSCON base, per discussion with Andre.
Signed-off-by: Sam Edwards
Cc: Andre Przywara
---
drivers/usb/musb-new/sunxi.c | 31
Only the older (ca. A10, A20) sunxis need this poke for the MUSB to
function. Mimic the Linux kernel and add a `has_sram` flag to the config
structure that is only set for the specific compatibles that require
this initialization.
Signed-off-by: Sam Edwards
Reviewed-by: Andre Przywara
Tested
Hello again,
The only change from v2 is that `syscon_base` is now a param of
`sunxi_musb_claim_sram`, and the TODO comment has been removed.
Cheers,
Sam
Sam Edwards (2):
usb: musb-new: sunxi: only perform SRAM initialization when necessary
usb: musb-new: sunxi: clarify the purpose of SRAM
Hi I²C maintainers,
My target has the following devices sharing one bus:
- 24C02 EEPROM
- Realtek 8370 Ethernet switch
- Allwinner T113-s3 (running U-Boot, interfacing via MVTWSI)
The RTL8370 is configured in "EEPROM autoload" mode, so on reset
it will load the full contents of the EEPROM.
Hi Andre,
On 12/5/22 17:45, Andre Przywara wrote:
Please let me know if you have any opinions!
I believe I promised you last month I'd let you know once I had a build
I'm happy with, and I'm pleased to say that I think I've reached that
point. I'm running quite rapidly out of sharp edges to
this initialization being about configuring a FIFO has
pretty much been debunked for years now.
This cleanup also adds a TODO comment about runtime discovery
of the SYSCON base, per discussion with Andre.
Signed-off-by: Sam Edwards
Cc: Andre Przywara
---
drivers/usb/musb-new/sunxi.c | 38
Only the older (ca. A10, A20) sunxis need this poke for the MUSB to
function. Mimic the Linux kernel and add a `has_sram` flag to the config
structure that is only set for the specific compatibles that require
this initialization.
Signed-off-by: Sam Edwards
Reviewed-by: Andre Przywara
Tested
ther invite somebody to "DO" it. :)
Thank you once again for your continued efforts,
Sam
Sam Edwards (2):
usb: musb-new: sunxi: only perform SRAM initialization when necessary
usb: musb-new: sunxi: clarify the purpose of SRAM initialization
drivers/usb/musb-new/sunxi.c | 43 +
Hi Andre,
I've applied most of this feedback (most of which comes as a relief; I
dislike inventing names for mystery bits) in preparation to send a v2,
but had two questions:
On 6/9/23 04:13, Andre Przywara wrote:
The new comments and function name are not from any official source,
but are
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