forced powerdown bit in the UTMIP_PLL_CFG2_0 register
which brings USB2 in UTMI mode to work. This was clearly missing
since the forced powerdown bit is set in reset by default for all
USB ports.
Signed-off-by: Stefan Agner
---
drivers/usb/host/ehci-tegra.c | 22 ++
1 file changed
forced powerdown bit in the UTMIP_PLL_CFG2_0 register
which brings USB2 in UTMI mode to work. This was clearly missing
since the forced powerdown bit is set in reset by default for all
USB ports.
Also use the slightly different bit fields of first USB, (USBD)
on Tegra 2.
Signed-off-by: Stefan Agner
Am 2014-02-14 23:45, schrieb Stefan Agner:
> /* Select ULPI parallel interface */
> - clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK, PTS_ULPI << PTS_SHIFT);
> + if (!controller->has_hostpc) {
> + clrsetbits_le32(
Clear the forced powerdown bit in the UTMIP_PLL_CFG2_0 register
which brings USB2 in UTMI mode to work. This was clearly missing
since the forced powerdown bit is set in reset by default for all
USB ports.
Signed-off-by: Stefan Agner
---
drivers/usb/host/ehci-tegra.c | 3 +++
1 file changed, 3
uld
also profit from this merge, if yes, I think then its definitely
worth doing it.
Stefan Agner (3):
usb: tegra: fix USB2 powerdown for Tegra30 and later
usb: tegra: fix PHY configuration
usb: tegra: combine header file
arch/arm/include/asm/arch-tegra/usb.h| 215 +
Combine the Tegra USB header file into one header file for all SoCs.
Use ifdef to account for the difference, especially Tegra20 is quite
different from newer SoCs. This avoids duplication especially
between Tegra30 and newer devices.
Signed-off-by: Stefan Agner
---
arch/arm/include/asm/arch
use the slightly different bit fields of first USB, (USBD) on
Tegra20 and move those definitions to the Tegra20 specific header
file.
Signed-off-by: Stefan Agner
---
arch/arm/include/asm/arch-tegra/usb.h | 5 -
arch/arm/include/asm/arch-tegra20/usb.h | 7 ++-
drivers/usb/host/ehci
Am 2014-02-18 20:27, schrieb Stephen Warren:
> On 02/16/2014 12:50 PM, Stefan Agner wrote:
>> +#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30)
>> +/* USB2_IF_ULPI_TIMING_CTRL_0 */
>> +#define ULPI_OUTPUT_PINMUX_BYP (1 << 10)
>>
use the slightly different bit fields of first USB, (USBD) on
Tegra20 and move those definitions to the Tegra20 specific header
file.
Reviewed-by: Stephen Warren
Signed-off-by: Stefan Agner
---
arch/arm/include/asm/arch-tegra/usb.h | 5 -
arch/arm/include/asm/arch-tegra20/usb.h | 7
ces between USBD and other USB ports into account
port_sc1
---
Stefan Agner (3):
usb: tegra: fix USB2 powerdown for Tegra30 and later
usb: tegra: fix PHY configuration
usb: tegra: combine header file
arch/arm/include/asm/arch-tegra/usb.h| 211 ++-
arch/arm/inclu
Clear the forced powerdown bit in the UTMIP_PLL_CFG2_0 register
which brings USB2 in UTMI mode to work. This was clearly missing
since the forced powerdown bit is set in reset by default for all
USB ports.
Acked-by: Stephen Warren
Signed-off-by: Stefan Agner
---
drivers/usb/host/ehci-tegra.c
Combine the Tegra USB header file into one header file for all SoCs.
Use ifdef to account for the difference, especially Tegra20 is quite
different from newer SoCs. This avoids duplication especially
between Tegra30 and newer devices.
Reviewed-by: Stephen Warren
Signed-off-by: Stefan Agner
Hi Andrzej,
Am 2013-11-25 11:00, schrieb Andrzej Telszewski:
> BTW, can you confirm that the nvflash command line switches I'm using
> are correct and also that the new odmdata value (0x1000) is a
> correct one?
Well, if it works, its not too bad :-).
However, the upstream BCT has the consol
Am 2014-04-30 23:09, schrieb Stephen Warren:
> From: Stephen Warren
>
> The TRM for Tegra30 and later all state that USBMODE_CM_HC must be set
> before writing to hostpc1_devlc to select which PHY to use for a USB
> controller. However, neither init_{utmi,ulpi}_usb_controller() do this
> today, s
When parsing a path with a leading slash, the root inode was freed which
lead
to a crash. Path parsing is now improved and allows leading slashs like
other
filesystem commands (e.g. ext4load).
Signed-off-by: Stefan Agner
---
fs/btrfs/btrfs.c | 6 +++---
1 file changed, 3 insertions(+), 3
Reading the super block leads to data abort crashes. Enabling the no
unaligned
option works around this. Since the format of the super block is fixed
by
the on-disk format unaligned access might by necessary in order to have
btrfs
support at all.
Signed-off-by: Stefan Agner
---
fs/btrfs
The function btrfs_mangle_name limited path lenght to 20 characters.
Since
the command parsing already checks spaces, the function is not needed at
all.
---
fs/btrfs/btrfs.c | 44 +---
1 file changed, 1 insertion(+), 43 deletions(-)
diff --git a/fs/btrfs
is also available at Github:
https://github.com/falstaff84/u-boot
Ali, could you review those patch and include it in your next
submission? When
is your next submission planned? I'm happy to help testing/fixing
remaining
problems...
Best regards,
Stefan Agner
Stefan Agner (3):
btrfs
Am 2013-07-11 15:54, schrieb Justin Waters:
> Give the user the ability to disable NAND support by defining
> CONFIG_NO_NAND. This will allow custom hardware to easily support
> this configuration.
If NAND is not enabled, we could also ifdef the SPI/MTD/CMD_FS
configurations since they are not use
d support for eMMC environment
> am335x_evm: Add am335x_boneblack variant
Applied your patches on v2013.07-rc3 and compiled the beaglebone target.
Works fine on my BeagleBone Black.
Tested-by: Stefan Agner
--
Stefan
___
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Am 2013-08-07 10:15, schrieb Andrzej Telszewski:
> Hi,
>
> I'm trying to get the U-Boot running on the Iris board with the
> Toradex Colibri T20 module. I was able to flash the U-Boot and it
> starts but then immediately stops with the only message being:
>
> U-Boot 2013.07 (Aug 06 2013 - 17:47:4
Am 2014-02-24 19:43, schrieb Stephen Warren:
> Are you planning on sending a later patch which removes
> arch/arm/include/asm/arch-tegra124/usb.h too?
I did not noticed that file, I created the patch on top of upstream
U-Boot. In which branch/repo can I find this file? git.denx.de seems to
be down
use the slightly different bit fields of first USB, (USBD) on
Tegra20 and move those definitions to the Tegra20 specific header
file.
Reviewed-by: Stephen Warren
Signed-off-by: Stefan Agner
---
arch/arm/include/asm/arch-tegra/usb.h | 5 -
arch/arm/include/asm/arch-tegra20/usb.h | 7
erging of the header files
Changes since v1:
- Take differences between USBD and other USB ports into account
port_sc1
---
Stefan Agner (3):
usb: tegra: fix USB2 powerdown for Tegra30 and later
usb: tegra: fix PHY configuration
usb: tegra: combine header file
arch/arm/include/asm/arch-
Combine the Tegra USB header file into one header file for all SoCs.
Use ifdef to account for the difference, especially Tegra20 is quite
different from newer SoCs. This avoids duplication, mainly for
Tegra30 and newer devices.
Reviewed-by: Stephen Warren
Signed-off-by: Stefan Agner
---
arch
Clear the forced powerdown bit in the UTMIP_PLL_CFG2_0 register
which brings USB2 in UTMI mode to work. This was clearly missing
since the forced powerdown bit is set in reset by default for all
USB ports.
Acked-by: Stephen Warren
Signed-off-by: Stefan Agner
---
drivers/usb/host/ehci-tegra.c
Hi Tom,
> Stephen Warren (1):
> ARM: tegra: make all I2C ports open-drain
>
> board/nvidia/dalmore/pinmux-config-dalmore.h | 16
> board/nvidia/venice2/pinmux-config-venice2.h | 16
> 2 files changed, 16 insertions(+), 16 deletions(-)
Is there something h
Am 2014-03-28 16:54, schrieb Tom Warren:
> Have they all been ACKed? Sorry, been really busy with normal NVIDIA stuff.
They have been ACKed, see
http://lists.denx.de/pipermail/u-boot/2014-March/175302.html
and tested by Stephen,
http://lists.denx.de/pipermail/u-boot/2014-March/174662.html
> I
Am 2014-03-11 18:43, schrieb ste...@agner.ch:
> From: Stefan Agner
>
> This patch series addresses several fixes and enhancements for the
> vybrid tower.
*Bump*, could we get an Ack on this?
Sorry about the missing thread/references, somehow my git format-patch
was m
Hi Stefano,
Am 2014-04-16 17:44, schrieb Stefano Babic:
> On 16/04/2014 15:29, ste...@agner.ch wrote:
>> From: Stefan Agner
>>
>> The i.MX V2 headers total size is 0x7fc. The header is placed
>> in front of the U-Boot binary which of course is aligned to
>> tex
Am 2014-04-16 15:17, schrieb Stefan Agner:
> Hi Stefano,
>
> Am 2014-04-16 17:44, schrieb Stefano Babic:
>> On 16/04/2014 15:29, ste...@agner.ch wrote:
>>> From: Stefan Agner
>>>
>>> The i.MX V2 headers total size is 0x7fc. The header is placed
>>
Hi Stefano,
Am 2014-04-17 10:50, schrieb Stefano Babic:
> On 16/04/2014 15:36, Stefan Agner wrote:
>>>> Can you better explain this ? There is only one board in mainline with
>>>> vf610. CONFIG_SYS_TEXT_BASE is set to 0x3f008000. I cannot get the
>>>> offse
Hi Stefano,
Am 2014-04-23 17:19, schrieb Stefano Babic:
> Hi Stefan,
>
> On 23/04/2014 04:34, Stefan Agner wrote:
>
>>>>
>>>> The header total size is 0x3fc (sizeof(imx_header_v2_t)) right now. This
>>>> patch would make alter it to be exactly 0
Am 2014-05-14 23:29, schrieb Anthony Felice:
> Removed settings in unsupported register fields. They didn’t
> do anything, and in most cases, were not documented in the
> reference manual.
>
> Changed register settings to comply with JEDEC required values.
>
> Changed timing parameters because th
This adds board support for the Toradex Colibri T30 module.
Working functions:
- SD card boot
- eMMC environment and boot
- USB host/USB client (on the dual role port)
- Network (via ASIX USB)
Signed-off-by: Stefan Agner
---
arch/arm/Kconfig | 4 +
arch/arm
Hi Simon,
Am 2014-07-31 19:41, schrieb Simon Glass:
> Hi Stefan,
>
> On 31 July 2014 18:36, Stefan Agner wrote:
>>
>> This adds board support for the Toradex Colibri T30 module.
>>
>
> A few quick questions below...
>
>
>>
>> Working fun
Am 2014-07-31 23:55, schrieb Simon Glass:
> Hi Stefan,
>
> On 31 July 2014 19:00, Stefan Agner wrote:
>> Hi Simon,
>>
>> Am 2014-07-31 19:41, schrieb Simon Glass:
>>> Hi Stefan,
>>>
>>> On 31 July 2014 18:36, Stefan Agner wrote:
>>
Am 2014-07-31 20:21, schrieb Stephen Warren:
> On 07/31/2014 11:36 AM, Stefan Agner wrote:
>> This adds board support for the Toradex Colibri T30 module.
>>
>> Working functions:
>> - SD card boot
>> - eMMC environment and boot
>> - USB host/USB client (o
Am 2014-08-04 19:16, schrieb Tom Rini:
> On Mon, Aug 04, 2014 at 11:02:28AM -0600, Stephen Warren wrote:
>> On 08/02/2014 08:09 AM, Stefan Agner wrote:
>> >Am 2014-07-31 20:21, schrieb Stephen Warren:
>> >>On 07/31/2014 11:36 AM, Stefan Agner wrote:
>> >&g
Am 2014-08-04 19:02, schrieb Stephen Warren:
> On 08/02/2014 08:09 AM, Stefan Agner wrote:
>> Am 2014-07-31 20:21, schrieb Stephen Warren:
>>> On 07/31/2014 11:36 AM, Stefan Agner wrote:
>>>> This adds board support for the Toradex Colibri T30 module.
>>>&
This adds board support for the Toradex Colibri T30 module.
Working functions:
- SD card boot
- eMMC environment and boot
- USB host/USB client (on the dual role port)
- Network (via ASIX USB)
Signed-off-by: Stefan Agner
---
This patch requires Stephens patch "ARM: tegra: enable DF
Add NFC (NAND Flash Controller) clock support and enable them
at board initialization time.
Signed-off-by: Stefan Agner
---
arch/arm/include/asm/arch-vf610/crm_regs.h | 14 ++
arch/arm/include/asm/arch-vf610/imx-regs.h | 1 +
2 files changed, 15 insertions(+)
diff --git a/arch/arm
This patch set adds NAND Flash Controller (NFC) support for
Freescale Vybrid ARM SoCs (vf610).
The driver is based on Bill Pringlemeirs prelineary patch sent
in January 2014 to the MTD mailing list:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-January/226623.html
Stefan Agner (4
Add pin mux for NAND Flash Controller (NFC). NAND can be connected
using 8 or 16 data lines, this patch adds pin mux entries for all
16 data lines.
Signed-off-by: Stefan Agner
---
arch/arm/include/asm/arch-vf610/iomux-vf610.h | 34 +++
arch/arm/include/asm/imx-common
This adds initial support for Freescale NFC (NAND Flash Controller).
The IP is used in ARM based Vybrid SoCs as well as on some PowerPC
devices. This driver is only tested on Vybrid.
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/fsl_nfc.c | 676
configuration block (BCB).
Signed-off-by: Stefan Agner
---
board/freescale/vf610twr/vf610twr.c | 47 ++---
configs/vf610twr_defconfig | 2 +-
configs/vf610twr_nand_defconfig | 3 +++
include/configs/vf610twr.h | 43
Am 2014-08-12 00:33, schrieb Scott Wood:
> On Wed, 2014-08-06 at 10:59 +0200, Stefan Agner wrote:
>> This adds initial support for Freescale NFC (NAND Flash Controller).
>> The IP is used in ARM based Vybrid SoCs as well as on some PowerPC
>> devices. This driver is
Am 2014-08-13 00:58, schrieb Bill Pringlemeir:
> On 12 Aug 2014, scottw...@freescale.com wrote:
>
>> On Tue, 2014-08-12 at 23:13 +0200, Stefan Agner wrote:
>>> Am 2014-08-12 00:33, schrieb Scott Wood:
>>>> On Wed, 2014-08-06 at 10:59 +0200, Stefan Agner wrote:
&g
Am 2014-08-13 00:58, schrieb Bill Pringlemeir:
[snip]
> +static u32 nfc_read(struct mtd_info *mtd, uint reg)
> +{
> + struct fsl_nfc *nfc = mtd_to_nfc(mtd);
> +
> + if (reg == NFC_FLASH_STATUS1 ||
> + reg == NFC_FLASH_STATUS2 ||
> + reg == NFC_IRQ_STATUS)
> +
Am 2014-08-13 17:14, schrieb Bill Pringlemeir:
> On 13 Aug 2014, ste...@agner.ch wrote:
>
>> Am 2014-08-13 00:58, schrieb Bill Pringlemeir:
>> [snip]
>>> +static u32 nfc_read(struct mtd_info *mtd, uint reg)
>>> +{
>>> + struct fsl_nfc *nfc = mtd_to_nfc(mtd);
>>> +
>>> +
Add NFC (NAND Flash Controller) clock support and enable them
at board initialization time.
Signed-off-by: Stefan Agner
---
arch/arm/include/asm/arch-vf610/crm_regs.h | 14 ++
arch/arm/include/asm/arch-vf610/imx-regs.h | 1 +
2 files changed, 15 insertions(+)
diff --git a/arch/arm
configuration block (BCB).
Signed-off-by: Stefan Agner
---
board/freescale/vf610twr/vf610twr.c | 47 ++---
configs/vf610twr_defconfig | 2 +-
configs/vf610twr_nand_defconfig | 3 +++
include/configs/vf610twr.h | 46
the amount of
written bits at all.
Performance numbers:
V1 => optimized count_written_bits
Read empty pages: 0.8MiB/s => 1.4MiB/s
V1 => optimized memcpy => optimized page_read/page_write
Read full pages: 3.6MiB/s => 7MiB/s => 10.3MiB/s
Stefan Agner (4):
arm: vf610: add NFC pi
Add pin mux for NAND Flash Controller (NFC). NAND can be connected
using 8 or 16 data lines, this patch adds pin mux entries for all
16 data lines.
Signed-off-by: Stefan Agner
---
arch/arm/include/asm/arch-vf610/iomux-vf610.h | 34 +++
arch/arm/include/asm/imx-common
This adds initial support for Freescale NFC (NAND Flash Controller)
found in ARM Vybrid SoC's, Power Architecture MPC5125 and others.
However, this driver is only tested on Vybrid.
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/Makefile| 1 +
drivers/mtd/nand/vf610_nfc.c
Am 2014-07-22 00:42, schrieb Stefan Agner:
> Am 2014-05-14 23:29, schrieb Anthony Felice:
>> Removed settings in unsupported register fields. They didn’t
>> do anything, and in most cases, were not documented in the
>> reference manual.
>>
>> Changed register setti
pins those GPIOs are on.
Acked-by: Stefan Agner
>
> Signed-off-by: Marcel Ziswiler
> ---
> arch/arm/dts/tegra30-apalis.dts | 9 +++--
> arch/arm/dts/tegra30-colibri.dts | 4 +++-
> 2 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/
> Signed-off-by: Sanchayan Maity
Acked-by: Stefan Agner
Thanks for the patchset, Sanchayan!
--
Stefan
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On 2015-04-21 01:17, Scott Wood wrote:
> On Wed, 2015-04-08 at 16:44 +0200, Stefan Agner wrote:
>> +case ALT_BUF_ONFI:
>> +/* Reverse byte since the controller uses big endianness */
>> +c = nfc->column % 4;
>> +c = nfc->col
512MiB
SLC NAND device, the bad block scan took 1.5s less than before.
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/vf610_nfc.c | 99 ++--
1 file changed, 40 insertions(+), 59 deletions(-)
diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand
Since we do not support sub-page writes anyway, reading the page
back to the controller on SEQIN command is not required. Remove
the page read on SEQIN.
However, the column/page values relevant to the SEQIN command, hence
set the column/row address on SEQIN command.
Signed-off-by: Stefan Agner
linglist lately.
Changes since v2:
- Reverse parameter page (ONFI) byte order only on little endian
architectures
- Rebased ontop of v2014.07-rc1, also considering new Vybrid board
colibri_vf_defconfig
Stefan Agner (8):
mtd: vf610_nfc: remove caching of page in buffer
mtd: vf610_nfc: remov
To improve performance we remember the current page in the buffer
and avoid reading it twice. This implicit page cache increases
complexity while does not increase performance in real world cases.
This patch removes that feature.
Acked-by: Bill Pringlemeir
Signed-off-by: Stefan Agner
Add option to choose between current 24-error correction and 32-error
correction through Kconfig. 32-error correction allow to use NAND
chips which require up to 8-bit error correction per 512 byte (when
using 2K pages).
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/Kconfig | 15
specified by ONFI.
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/vf610_nfc.c | 67
include/configs/colibri_vf.h | 1 +
include/configs/vf610twr.h | 1 +
3 files changed, 51 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand
This commit allows users to enable/disable the Freescale NFC
controller found in systems like Vybrid (VF610), MPC5125, MCF54418
or Kinetis K70 via Kconfig with more detailed help docs.
Signed-off-by: Stefan Agner
---
configs/colibri_vf_defconfig | 2 ++
configs/vf610twr_defconfig | 2
Allow bit flips in a empty page up to half of the recoverable
bits (strength / 2).
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/vf610_nfc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand/vf610_nfc.c
index 66b335d..16485f5
Use in-band bad block table (NAND_BBT_NO_OOB) which allows to
use the full OOB for hardare ECC purposes. Since there is no
ECC correction on the OOB it is also safer to use in-band area
to store the bad block table marker.
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/vf610_nfc.c | 29
er,
while in fact the page is erased (0xff).
Avoid the hassle to calculate whether the page is affected or not,
but set the page buffer unconditionally to invalid instead.
Signed-off-by: Stefan Agner
---
This are two bug fixes which would be nice if they would still
make it into 2015.04...
dr
flawless.
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/vf610_nfc.c | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand/vf610_nfc.c
index 9de971c..d98dd28 100644
--- a/drivers/mtd/nand/vf610_nfc.c
+++ b
assle to calculate whether the page is affected or not,
>> but set the page buffer unconditionally to invalid instead.
>>
>> Signed-off-by: Stefan Agner
>> ---
>> This are two bug fixes which would be nice if they would still
>> make it into 2015.04...
>>
nand dump command returns the data from the buffer,
>> > while in fact the page is erased (0xff).
>> >
>> > Avoid the hassle to calculate whether the page is affected or not,
>> > but set the page buffer unconditionally to invalid instead.
>> >
>
On 2015-03-30 22:48, Scott Wood wrote:
> On Mon, 2015-03-30 at 22:40 +0200, Stefan Agner wrote:
>> On 2015-03-30 22:34, Scott Wood wrote:
>> > On Mon, 2015-03-30 at 13:02 -0400, Bill Pringlemeir wrote:
>> >> On 24 Mar 2015, ste...@agner.ch wrote:
>> >>
&
On 2015-03-31 00:15, Scott Wood wrote:
> On Mon, 2015-03-30 at 23:26 +0200, Stefan Agner wrote:
>> On 2015-03-30 22:48, Scott Wood wrote:
>> > What is special about this controller, that caching makes sense here but
>> > not on other controllers? If it makes sense
upport
>
> Tested on Colibri VF50/VF61 booting using serial loader over UART.
>
> Signed-off-by: Stefan Agner
> Signed-off-by: Sanchayan Maity
> ---
> arch/arm/Kconfig | 5 +
> arch/arm/include/asm/arch-vf610/imx-regs.h | 5 +
> bo
To improve performance we remember the current page in the buffer
and avoid reading it twice. This implicit page cache increases
complexity while does not increase performance in real world cases.
This patch removes that feature.
---
As discussed in the other patchset...
http://thread.gmane.org/gma
Implement read of OOB area only. When using column and sector size
properties, only parts of the page can be read. However, this works
only when hardware ECC is disabled, otherwise the ECC engine would
ruin the data in the buffer. To allow OOB only reads, three points
had to be addressed:
- Set ECC
On 2015-04-03 01:48, Scott Wood wrote:
> On Tue, 2015-03-31 at 11:02 -0400, Bill Pringlemeir wrote:
>> On 2015-03-31 00:15, Scott Wood wrote:
>>
>> > Especially since you'd be doing one write rather than four full-page
>> > "partial" writes. Surely the bottleneck here is the NAND chip itself,
>> >
Use in-band bad block table (NAND_BBT_NO_OOB) which allows to
use the full OOB for hardare ECC purposes. Since there is no
ECC correction on the OOB it is also safer to use in-band area
to store the bad block table marker.
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/vf610_nfc.c | 29
This commit allows users to enable/disable the Freescale NFC
controller found in systems like Vybrid (VF610), MPC5125, MCF54418
or Kinetis K70 via Kconfig with more detailed help docs.
Signed-off-by: Stefan Agner
---
configs/vf610twr_defconfig | 2 ++
drivers/mtd/nand/Kconfig | 15
Add option to choose between current 24-error correction and 32-error
correction through Kconfig. 32-error correction allow to use NAND
chips which require up to 8-bit error correction per 512 byte (when
using 2K pages).
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/Kconfig | 15
calculates the hardware ECC across the whole page before
programming the page.
This method saves transferring the whole page over the bus to the NFC
IP, which would happen when using NAND_NO_SUBPAGE_WRITE.
Signed-off-by: Stefan Agner
---
This implements the procedure as discussed on the ML:
http
On 2015-04-03 22:15, Scott Wood wrote:
> On Fri, 2015-04-03 at 20:09 +0200, Stefan Agner wrote:
>> On 2015-04-03 01:48, Scott Wood wrote:
>> > On Tue, 2015-03-31 at 11:02 -0400, Bill Pringlemeir wrote:
>> >> On 2015-03-31 00:15, Scott Wood wrote:
>> >>
&
On 2015-04-03 22:30, Scott Wood wrote:
> On Fri, 2015-04-03 at 20:40 +0200, Stefan Agner wrote:
>> This commit allows users to enable/disable the Freescale NFC
>> controller found in systems like Vybrid (VF610), MPC5125, MCF54418
>> or Kinetis K70 via Kconfig with mo
On 2015-04-03 22:36, Scott Wood wrote:
> On Fri, 2015-04-03 at 20:40 +0200, Stefan Agner wrote:
>> Support subpage writes using a custom implementation of write_subpage.
>> The driver loads the page into SRAM buffer using NAND_CMD_READ0, when
>> the framework requests the N
On 2015-04-03 22:46, Scott Wood wrote:
> On Fri, 2015-04-03 at 22:42 +0200, Stefan Agner wrote:
>> On 2015-04-03 22:30, Scott Wood wrote:
>> > On Fri, 2015-04-03 at 20:40 +0200, Stefan Agner wrote:
>> >> This commit allows users to enable/disable the Freescale NFC
>
On 2015-04-02 22:30, Bill Pringlemeir wrote:
> On 2 Apr 2015, ste...@agner.ch wrote:
>
>> To improve performance we remember the current page in the buffer
>> and avoid reading it twice. This implicit page cache increases
>> complexity while does not increase performance in real world cases.
>> T
On 2015-04-07 16:24, Bill Pringlemeir wrote:
> On 7 Apr 2015, ste...@agner.ch wrote:
>> On 2015-04-02 22:30, Bill Pringlemeir wrote:
>>> On 2 Apr 2015, ste...@agner.ch wrote:
>
>>> [snip]
>
>>> I also measured 'write performance' with the mtd_speedtest
>>> (performing similar patch to the Linux
linglist lately.
Stefan Agner (8):
mtd: vf610_nfc: remove caching of page in buffer
mtd: vf610_nfc: remove read on SEQIN
mtd: vf610_nfc: allow bitflips in an empty page
mtd: vf610_nfc: implement OOB only read
mtd: vf610_nfc: use in-band bad block table
mtd: vf610_nfc: add Freescale NFC con
Add option to choose between current 24-error correction and 32-error
correction through Kconfig. 32-error correction allow to use NAND
chips which require up to 8-bit error correction per 512 byte (when
using 2K pages).
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/Kconfig | 15
Since we do not support sub-page writes anyway, reading the page
back to the controller on SEQIN command is not required. Remove
the page read on SEQIN.
However, the column/page values relevant to the SEQIN command, hence
set the column/row address on SEQIN command.
Signed-off-by: Stefan Agner
This commit allows users to enable/disable the Freescale NFC
controller found in systems like Vybrid (VF610), MPC5125, MCF54418
or Kinetis K70 via Kconfig with more detailed help docs.
Signed-off-by: Stefan Agner
---
configs/vf610twr_defconfig | 2 ++
doc/README.nand| 18
To improve performance we remember the current page in the buffer
and avoid reading it twice. This implicit page cache increases
complexity while does not increase performance in real world cases.
This patch removes that feature.
Acked-by: Bill Pringlemeir
Signed-off-by: Stefan Agner
Allow bit flips in a empty page up to half of the recoverable
bits (strength / 2).
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/vf610_nfc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand/vf610_nfc.c
index 66b335d..16485f5
512MiB
SLC NAND device, the bad block scan took 1.5s less than before.
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/vf610_nfc.c | 99 ++--
1 file changed, 40 insertions(+), 59 deletions(-)
diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand
specified by ONFI.
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/vf610_nfc.c | 65
include/configs/vf610twr.h | 1 +
2 files changed, 48 insertions(+), 18 deletions(-)
diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand/vf610_nfc.c
Use in-band bad block table (NAND_BBT_NO_OOB) which allows to
use the full OOB for hardare ECC purposes. Since there is no
ECC correction on the OOB it is also safer to use in-band area
to store the bad block table marker.
Signed-off-by: Stefan Agner
---
drivers/mtd/nand/vf610_nfc.c | 29
Am 2014-09-09 17:19, schrieb Stefano Babic:
> Hi Stefan, Albert,
>
> On 09/09/2014 17:14, Stefan Agner wrote:
>> Hi Albert,
>>
>> The RESEND version of the patch is actually an updated version (maybe I
>> should have increased the version number?)
>>
>
Am 2014-08-14 23:12, schrieb Bill Pringlemeir:
>> On 14 Aug 2014, ste...@agner.ch wrote:
>>
>> This adds initial support for Freescale NFC (NAND Flash Controller)
>> found in ARM Vybrid SoC's, Power Architecture MPC5125 and others.
>> However, this driver is only tested on Vybrid.
>
> This is only
boot configuration block
(BCB).
Signed-off-by: Stefan Agner
---
board/freescale/vf610twr/vf610twr.c | 47 ++---
configs/vf610twr_defconfig | 2 +-
configs/vf610twr_nand_defconfig | 3 +++
include/configs/vf610twr.h | 46
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