Am Montag, den 29.11.2021, 22:58 -0500 schrieb Tom Rini:
> On Tue, Nov 30, 2021 at 01:06:56AM +0100, Stefan Mätje wrote:
>
> > On AM4372 the SPI_GCLK input gets its clock from the PRCM module which
> > divides the PER_CLKOUTM2 frequency (192MHz) by a fixed factor of 4.
> &
00 / 4).
Signed-off-by: Stefan Mätje
---
drivers/spi/ti_qspi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 664b9cad79..bccdeeaf82 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -25,7
-Boot version being used here. But it should apply cleanly to the
current mainline U-Boot tree.
PS.: I'm not on the list. Any questions should sent to me directly.
Best regards,
Stefan Mätje
Stefan Mätje (1):
Fix wrong QSPI clock calculation for AM4372
drivers/spi/ti_qspi.c | 3 +
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