From: Thierry Reding
The PCIe bus on Cardhu is routed to the dock connector. An ethernet NIC
is available on the dock over the PCIe bus. Enable the PCIe controller
and the network device driver so that the device can boot over the
network.
Signed-off-by: Thierry Reding
---
arch/arm/dts
From: Thierry Reding
Add support for the PCIe controller found on some generations of Tegra.
Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root
ports with a total of 6 lanes and Tegra124 has 2 root ports with a total
of 5 lanes.
Signed-off-by: Thierry Reding
---
drivers/pci
From: Thierry Reding
Add a device tree node for the GIC v2 found on the Cortex-A15 CPU
complex of Tegra124. U-Boot doesn't use this but subsequent patches will
add device tree nodes that reference it by phandle.
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra124.dtsi
From: Thierry Reding
Add the device tree node for the PCIe controller found on Tegra124 SoCs.
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra124.dtsi | 67 ++
include/dt-bindings/clock/tegra124-car.h | 341 +++
2 files changed, 408
From: Thierry Reding
Add the device tree node for the PCIe controller found on Tegra30 SoCs.
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra30.dtsi | 71 +
include/dt-bindings/clock/tegra30-car.h | 265
2 files changed, 336
From: Thierry Reding
Add the device tree node for the PCIe controller found on Tegra20 SoCs.
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra20.dtsi | 56 +++
include/dt-bindings/clock/tegra20-car.h | 158
2 files changed, 214
From: Thierry Reding
The TrimSlice has an ethernet NIC connected to the PCIe bus. Enable the
PCIe controller and the network driver so that the device can boot over
the network.
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra20-trimslice.dts | 35
From: Thierry Reding
This controller was introduced on Tegra114 to handle XUSB pads. On
Tegra124 it is also used for PCIe and SATA pin muxing and PHY control.
Only the Tegra124 PCIe and SATA functionality is currently implemented,
with weak symbols on Tegra114.
Tegra20 and Tegra30 also provide
From: Thierry Reding
Add the PCIe and SATA lane configuration to the Jetson TK1 device tree,
so that the XUSB pad controller can be appropriately configured.
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra124-jetson-tk1.dts | 26 ++
1 file changed, 26 insertions
From: Thierry Reding
The Beaver has an ethernet NIC connected to the PCIe bus. Enable the
PCIe controller and the network device driver so that the device can
boot over the network.
In addition the board has a mini-PCIe expansion slot.
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra30
From: Thierry Reding
The XUSB pad controller is used for pinmuxing of the XUSB, PCIe and SATA
lanes.
Signed-off-by: Thierry Reding
---
arch/arm/dts/tegra124.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi
index
From: Thierry Reding
This reset is required for PCIe and the corresponding ID therefore needs
to be defined.
Signed-off-by: Thierry Reding
---
arch/arm/cpu/tegra20-common/clock.c | 4 ++--
arch/arm/cpu/tegra30-common/clock.c | 1 +
arch/arm/include/asm/arch-tegra20
From: Thierry Reding
This macro can be overridden in source files (before including common.h)
and can be used to specify a prefix for debug and error messages. An
example of how to use this is shown below:
#define pr_fmt(fmt) "foo: " fmt
#include
...
From: Thierry Reding
This function is required by PCIe and SATA. This patch implements it on
Tegra20, Tegra30 and Tegra124. It isn't implemented for Tegra114 because
it doesn't support PCIe or SATA.
Signed-off-by: Thierry Reding
---
arch/arm/cpu/tegra124-common/clock.c
From: Thierry Reding
Add the fdt_get_resource() and fdt_get_named_resource() functions which
can be used to parse resources (memory regions) from an FDT. A helper to
compute the size of a region is also provided.
Signed-off-by: Thierry Reding
---
include/fdtdec.h | 48
From: Thierry Reding
Implement the powergate API that allows various power partitions to be
power up and down.
Signed-off-by: Thierry Reding
---
arch/arm/cpu/tegra-common/Makefile | 1 +
arch/arm/cpu/tegra-common/powergate.c | 80 ++
arch/arm
From: Thierry Reding
The fdt_for_each_subnode() iterator macro provided by this patch can be
used to iterate over a device tree node's subnodes. At each iteration a
loop variable will be set to the next subnode.
Signed-off-by: Thierry Reding
---
include/libfdt.h | 20 ++
From: Thierry Reding
The fdtdec_pci_get_bdf() function returns the bus, device, function
triplet of a PCI device by parsing the "reg" property according to the
PCI device tree binding.
Signed-off-by: Thierry Reding
---
include/fdtdec.h | 11 +++
lib/fdtdec.c | 14 +++
From: Thierry Reding
Given a device tree node and a property name, the fdt_get_string_index()
function will look up a given string in the string list contained in the
property's value and return its index.
Signed-off-by: Thierry Reding
---
include/libfdt.h| 11 +++
lib/l
From: Thierry Reding
This series adds PCIe support for Tegra20, Tegra30 and Tegra124. The size is
mostly due to the large number of infrastructure that's added (libfdt, Tegra
specific drivers required by the PCIe driver).
Patches 1-5 add various FDT helpers to make it easier to parse co
From: Thierry Reding
Given a device tree node, the fdt_n_addr_cells() function will walk up
the device tree and search for an #address-cells property. It returns
the number of cells required by the device tree node to represent an
address.
Similarly the fdt_n_size_cells() function returns the
From: Thierry Reding
When creating build directories also create parents as necessary. This
fixes a failure when building a hierarchical branch (i.e. foo/bar).
Signed-off-by: Thierry Reding
---
tools/buildman/builderthread.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
From: Thierry Reding
It's not unusual for DHCP servers to take a couple hundred milliseconds
to respond to DHCP discover messages. One possible reason for the delay
can be that the server checks (typically using an ARP request) that the
IP it's about to hand out isn't in use yet.
On Fri, Aug 15, 2014 at 11:39:08PM +0200, Thierry Reding wrote:
> On Fri, Aug 15, 2014 at 10:02:40AM -0600, Stephen Warren wrote:
[...]
> > (and as an aside, how on earth is your DHCP server taking >500ms to respond,
> > yet still actually responding?)
>
> It's a bla
On Fri, Aug 15, 2014 at 10:02:40AM -0600, Stephen Warren wrote:
> On 08/15/2014 06:49 AM, Thierry Reding wrote:
> >On Fri, Aug 15, 2014 at 02:39:45PM +0200, Thierry Reding wrote:
> >>On Fri, Jul 25, 2014 at 05:30:48PM -0600, Stephen Warren wrote:
> >>>From: Stephe
On Fri, Jul 25, 2014 at 05:30:48PM -0600, Stephen Warren wrote:
> From: Stephen Warren
>
> Currently, the BOOTP code sends out its initial request as soon as the
> Ethernet driver indicates "link up". If this packet is lost or not
> replied to for some reason, the code waits for a 1s timeout befo
On Fri, Aug 15, 2014 at 02:39:45PM +0200, Thierry Reding wrote:
> On Fri, Jul 25, 2014 at 05:30:48PM -0600, Stephen Warren wrote:
> > From: Stephen Warren
> >
> > Currently, the BOOTP code sends out its initial request as soon as the
> > Ethernet driver indicates &
| 3 ++
> arch/arm/cpu/tegra-common/vpr.c | 35 +++
> arch/arm/include/asm/arch-tegra/ap.h| 9 ++
> arch/arm/include/asm/arch-tegra124/mc.h | 49
> +
> 5 files changed, 97 insertions(+)
> create mode 100644
I've been booting Venice2 with these patches for a day now, everything
seems to work as expected, so:
Tested-by: Thierry Reding
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On Thu, Jan 23, 2014 at 05:42:55PM -0700, Stephen Warren wrote:
[...]
> diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.c
> b/arch/arm/cpu/arm720t/tegra-common/cpu.c
[...]
> @@ -128,6 +144,18 @@ int pllx_set_rate(struct clk_pll_simple *pll , u32 divn,
> u32 divm,
>
> debug(" pllx_set_r
On Thu, Jan 23, 2014 at 05:42:54PM -0700, Stephen Warren wrote:
[...]
> diff --git a/arch/arm/include/asm/arch-tegra/clk_rst.h
> b/arch/arm/include/asm/arch-tegra/clk_rst.h
[...]
> @@ -105,10 +128,10 @@ struct clk_rst_ctlr {
> uint crc_clk_cpug_cmplx;/* _CLK_CPUG_CMPLX_0, 0x378
a30_adjust_pllp(), where it's implied
that when you call tegra30_*() from code targetted at later generations
these would be compatible with Tegra30.
But if you'd rather make it implicit that's fine too.
Either way:
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Acked-by:
IG_TEGRA30)
> + uint pmc_pwrgate_timer_on; /* _PWRGATE_TIMER_ON_0, offset 28 */
The comment here is wrong, it's still at offset 0x2c. Other than that:
Reviewed-by: Thierry Reding
Acked-by: Thierry Reding
I've also applied this to my local tree that I booted the Venice2 from,
along
egra30-common/clock.c | 6 --
> arch/arm/include/asm/arch-tegra/clock.h | 6 ++
> 3 files changed, 6 insertions(+), 12 deletions(-)
With the few small comments addressed, the series:
Reviewed-by: Thierry Reding
I've also given these a spin together with yo
On Wed, Jan 22, 2014 at 01:20:33PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> OUT_CLK_SOURCE_ are currently named after the number of bits the mask
> they represent includes. However, bit count is not the only possible
> variable; bit position may also vary. Rename OUT_CLK_SOURCE_ to
On Wed, Jan 22, 2014 at 01:20:32PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> The only place where the MASK_BITS_* values are used is in
> adjust_periph_pll(), which interprets the value 4 (old MASK_BITS_29_28,
> new MASK_BITS_31_28) as being associated with mask OUT_CLK_SOURCE4_MASK
On Wed, Jan 22, 2014 at 01:20:35PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> Since all code that sets or interprets MASK_BITS_* now uses the enums
> to define/compare the values, there is no need for MASK_BITS_* to have
> a specific integer value. In fact, having a specific integer
On Thu, Oct 17, 2013 at 08:59:22AM -0600, Stephen Warren wrote:
> On 10/17/2013 04:50 AM, Thierry Reding wrote:
> > On Thu, Oct 17, 2013 at 11:29:06AM +0200, Alban Bedel wrote:
> >> On Mon, 23 Sep 2013 17:23:12 -0700 Tom Warren
> >> wrote:
> >>
> >>
On Thu, Oct 17, 2013 at 11:29:06AM +0200, Alban Bedel wrote:
> On Mon, 23 Sep 2013 17:23:12 -0700
> Tom Warren wrote:
>
> > It's fine as-is for now. Send a V2 with any changes Stephen, et al requested
> > (if any), and I'll get it into tegra-next when I return from vacation
> > next Monday (assum
On Tue, Oct 08, 2013 at 12:42:53AM +0200, Tom Warren wrote:
> This provides SPL support for T124 boards - AVP
> early init, plus CPU (A15) init/jump to main U-Boot.
>
> Change-Id: I721f83f1d5fa549e0698e0cc76ab3e5ea11ba895
> Signed-off-by: Tom Warren
> ---
> arch/arm/cpu/arm720t/tegra-common/cpu.
On Tue, Oct 08, 2013 at 12:42:52AM +0200, Tom Warren wrote:
> Minor changes to support T124 chip and sku IDs.
SKU is an abbreviation, therefore should be uppercase.
Thierry
---
This email message is for the sole use
On Tue, Oct 08, 2013 at 12:42:51AM +0200, Tom Warren wrote:
> No real HW change on T124 for 90% of the toys, so just include
> a common T1x4 header file (based on T114 headers), and if a new
> register/bit is needed, add it at the end. Some headers (clk_rst,
> clock-tables, pinmux, etc.) had too ma
From: Jimmy Zhang
The M, N and P width have been changed from Tegra30. The maximum value
for N is limited to 255. So, the tegra_pll_x_table for Tegra114 should
be set accordingly.
Signed-off-by: Jimmy Zhang
Reviewed-by: Tom Warren
Signed-off-by: Thierry Reding
---
Changes in v3:
- none
On Mon, Sep 30, 2013 at 02:25:57PM -0700, Tom Warren wrote:
> Thierry,
>
> > -Original Message-
> > From: Thierry Reding [mailto:thierry.red...@gmail.com]
> > Sent: Monday, September 23, 2013 1:08 PM
> > To: Tom Warren
> > Cc: u-boot@lists.denx.de
>
PLLX no longer has the CPCON field on Tegra114, so do not attempt to
program it.
Signed-off-by: Thierry Reding
---
Changes in v3:
- don't leak PLLX_BASE bits into PLLX_MISC
Changes in v2:
- new patch
arch/arm/cpu/arm720t/tegra-common/cpu.c | 6 +-
1 file changed, 5 insertions(
From: Jimmy Zhang
The M, N and P width have been changed from Tegra30. The maximum value
for N is limited to 255. So, the tegra_pll_x_table for Tegra114 should
be set accordingly.
Signed-off-by: Jimmy Zhang
Reviewed-by: Tom Warren
Signed-off-by: Thierry Reding
---
Changes in v2:
- clean up
PLLX no longer has the CPCON field on Tegra114, so do not attempt to
program it.
Signed-off-by: Thierry Reding
---
Changes in v2:
- new patch
arch/arm/cpu/arm720t/tegra-common/cpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.c
I no longer work for Avionic Design and don't have access to hardware,
so I'll pass on maintainership to Alban.
Acked-by: Alban Bedel
Signed-off-by: Thierry Reding
---
Hi Tom,
I assume this is something you'd want to take through the Tegra tree?
Thierry
boards.cfg | 6 +++---
This chip is compatible with the existing driver, except that it uses
BAR2 instead of BAR1 for the I/O memory region. Using this patch I can
use the PCIe ethernet interface on the CompuLab Trimslice to boot from
the network.
Signed-off-by: Thierry Reding
---
drivers/net/rtl8169.c | 18
currticks() is defined as get_timer(0), which returns an unsigned long,
so use %lu instead of %d to print the result.
Signed-off-by: Thierry Reding
---
drivers/net/rtl8169.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
This chip is compatible with other RTL8168 chips and can be found on the
NVIDIA Cardhu and Beaver boards.
Signed-off-by: Thierry Reding
---
drivers/net/rtl8169.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index c217e6f..c87ea74 100644
--- a
instead of the
descriptor and a missing cache invalidation before reading the packet
data that the NIC just wrote to memory.
Signed-off-by: Thierry Reding
---
drivers/net/rtl8169.c | 61 ---
1 file changed, 53 insertions(+), 8 deletions(-)
diff
Forcibly set hose->pci_prefetch to NULL to make sure it will be setup.
This will help if for any reason callers didn't make sure themselves to
NULL the field.
Signed-off-by: Thierry Reding
---
drivers/pci/pci_auto.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dri
The Linux kernel cannot unpack a ramdisk that's stored in high memory.
Unless the initrd_high environment variable is explicitly set, abide by
that restriction using the getenv_bootm_low() and getenv_bootm_mapsize()
helpers.
Signed-off-by: Thierry Reding
---
Changes in v2:
- update fun
If a ramdisk has been loaded to low memory to begin with, there's no
need to relocate it.
Signed-off-by: Thierry Reding
---
common/image.c | 12
1 file changed, 12 insertions(+)
diff --git a/common/image.c b/common/image.c
index 47336f2..d19c0e6 100644
--- a/common/image.c
On Wed, Sep 04, 2013 at 11:59:44AM -0600, Stephen Warren wrote:
> On 09/04/2013 07:00 AM, Alban Bedel wrote:
> > Add the Tegra30 SKU b1 and treat it like other Tegra30 chips.
>
> CC'ing the Tegra maintainer would be helpful (Tom Warren; I CC'd him here)
>
> > diff --git a/arch/arm/cpu/tegra-commo
From: Jimmy Zhang
The M, N and P width have been changed from Tegra30. The maximum value
for N is limited to 255. So, the tegra_pll_x_table for Tegra114 should
be set accordingly.
Signed-off-by: Jimmy Zhang
Reviewed-by: Tom Warren
Signed-off-by: Thierry Reding
---
arch/arm/cpu/arm720t/tegra
On Thu, Jul 18, 2013 at 03:19:18PM -0600, Stephen Warren wrote:
> On 07/18/2013 01:13 PM, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > Currently all Tegra SoCs are assumed to have 32 byte cache lines. This
> > isn't true for Tegra114, however, w
From: Thierry Reding
Disabling the data cache is no longer required to boot Dalmore, so
enable it. This results in notably better performance when loading
and booting the Linux kernel.
Signed-off-by: Thierry Reding
---
include/configs/dalmore.h | 3 ---
1 file changed, 3 deletions(-)
diff
From: Thierry Reding
Currently all Tegra SoCs are assumed to have 32 byte cache lines. This
isn't true for Tegra114, however, which uses 4 Cortex-A15 cores and
therefore uses a cache line size of 64 bytes. Move the cache line size
setting to the per-SoC common configuration file.
Signed-o
t; > ourselves. Any pointer in the right directions would be greatly
> > appreciated.
>
> I don't believe anyone is actively working on this at present. It would
> be great to have this support in place.
>
> If you want to take a crack at it yourself, I suggest the foll
On Thu, Jul 11, 2013 at 08:21:17PM +0200, Wolfgang Denk wrote:
> Dear Thierry Reding,
>
> In message <20130711150014.ga2...@dhcp-172-17-186-34.nvidia.com> you wrote:
> >
> > > I'm pretty sure it's all architectures, and this is a problem for device
>
On Thu, Jul 11, 2013 at 08:39:28AM -0400, Tom Rini wrote:
> On Thu, Jul 11, 2013 at 11:46:19AM +0200, Wolfgang Denk wrote:
> > Dear Thierry Reding,
> >
> > In message <1373500071-6476-1-git-send-email-thierry.red...@gmail.com> you
> > wrote:
> > >
>
From: Thierry Reding
The Linux kernel cannot unpack a ramdisk that's stored in high memory.
Unless the initrd_high environment variable is explicitly set, abide by
that restriction using the getenv_bootm_low() and getenv_bootm_mapsize()
helpers.
Signed-off-by: Thierry Reding
---
c
On Sat, Jun 22, 2013 at 06:22:48PM +0800, Axel Lin wrote:
> Signed-off-by: Axel Lin
> ---
> drivers/gpio/pca953x.c | 5 +
> 1 file changed, 1 insertion(+), 4 deletions(-)
Reviewed-by: Thierry Reding
pgpyYIwLVs86H.pgp
Description: P
On Thu, Jun 20, 2013 at 04:13:38PM +0800, Jim Lin wrote:
> Add DT node for USB EHCI function.
> Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.
>
> Signed-off-by: Jim Lin
> ---
> Changes in v2:
> - Remove PLL parameters from dt file
> Changes in v3:
> - Change VBus GPIO from H.05 t
On Mon, Jun 17, 2013 at 10:39:12PM +0200, Marek Vasut wrote:
> Dear Thierry Reding,
>
> > On Sun, Jun 16, 2013 at 10:48:45PM +0200, Marek Vasut wrote:
> > > Dear Thierry Reding,
> > >
> > > > On Sat, Jun 15, 2013 at 11:28:25PM +0200, Marek
om the patch.
Besides the one issue I'm still seeing with the very old flash drive,
which might turn out not to be specific to Tegra, this series:
Tested-by: Thierry Reding
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On Sat, Jun 15, 2013 at 09:46:19PM +0200, Marek Vasut wrote:
> Dear Jim Lin,
>
> > Add DT node for USB EHCI function.
> > Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.
>
> I'd like to get ACK from someone with the actual hardware.
>
> btw. How usable is the cardhu with current U-B
On Sun, Jun 16, 2013 at 10:48:45PM +0200, Marek Vasut wrote:
> Dear Thierry Reding,
>
> > On Sat, Jun 15, 2013 at 11:28:25PM +0200, Marek Vasut wrote:
> > > Dear Thierry Reding,
> > >
> > > > On Fri, Jun 14, 2013 at 06:41:40PM +0800, Jim Lin wrote:
>
On Sat, Jun 15, 2013 at 11:28:25PM +0200, Marek Vasut wrote:
> Dear Thierry Reding,
>
> > On Fri, Jun 14, 2013 at 06:41:40PM +0800, Jim Lin wrote:
> > [...]
> >
> > > diff --git a/board/nvidia/dts/tegra30-beaver.dts
> > > b/board/nvidia/dts/tegra30-bea
On Fri, Jun 14, 2013 at 06:41:40PM +0800, Jim Lin wrote:
[...]
> diff --git a/board/nvidia/dts/tegra30-beaver.dts
> b/board/nvidia/dts/tegra30-beaver.dts
[...]
> @@ -68,4 +69,9 @@
> status = "okay";
> bus-width = <8>;
> };
> +
> + usb@7d008000 {
> +
On Fri, Jun 14, 2013 at 06:41:40PM +0800, Jim Lin wrote:
> Add DT node for USB EHCI function.
> Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.
>
> Signed-off-by: Jim Lin
Hi Jim,
none of the patches in this series have a changelog that list the
changes between v1 to v2. It's custom
Move the nand-controller node to the tegra20-tamonten.dtsi so that it
can be shared between all derived boards.
Signed-off-by: Thierry Reding
---
board/avionic-design/dts/tegra20-tamonten.dtsi | 11 +++
board/avionic-design/dts/tegra20-tec.dts | 11 ---
2 files changed, 11
Boot script support brings Medcom-Wide in line with other Tegra boards.
In order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding
---
include/configs/medcom-wide.h | 21 -
1 file changed, 12
Boot script support brings TEC in line with other Tegra boards. To
enable booting a Linux kernel with initial ramdisk, also include support
for the new FIT image type.
Signed-off-by: Thierry Reding
---
include/configs/tec.h | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff
Boot script support brings Plutux in line with other Tegra boards. In
order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding
---
include/configs/plutux.h | 18 +++---
1 file changed, 11 insertions(+), 7
On Mon, Mar 04, 2013 at 01:46:48PM -0700, Tom Warren wrote:
[...]
> I kinda lost track of this patchset. I'd like to move it into
> u-boot-tegra/next if you think it's ready, but I'm not sure if it
> conflicts with/works with Stephen's 4th patch of his v2 series ("ARM:
> tegra: enable a common set
On Wed, Feb 27, 2013 at 02:03:37PM -0700, Stephen Warren wrote:
> On 02/26/2013 04:00 PM, Stephen Warren wrote:
> > This is useful on all Tegras, so that boot.scr on all devices can use
> > the same commands. Hence, move it to tegra-common.h.
>
> Unfortunately, this breaks Tegra114 builds because
On Thu, Feb 21, 2013 at 10:00:20AM +0100, Thierry Reding wrote:
> On Wed, Feb 20, 2013 at 02:05:46PM -0700, Tom Warren wrote:
> > This patchset adds device-tree support to the Tegra MMC driver.
> > All device config is done via properties in the DT files instead
> > of hard
On Wed, Feb 20, 2013 at 02:05:46PM -0700, Tom Warren wrote:
> This patchset adds device-tree support to the Tegra MMC driver.
> All device config is done via properties in the DT files instead
> of hard-coded config options/function arguments.
>
> I've tested this on my Seaboard and everything wor
On Thu, Feb 14, 2013 at 08:19:54AM +0100, Thierry Reding wrote:
> On Wed, Feb 13, 2013 at 02:44:47PM -0700, Tom Warren wrote:
> > This patchset adds device-tree support to the Tegra MMC driver.
> > All device config is done via properties in the DT files instead
> > of hard
On Thu, Feb 14, 2013 at 10:19:28AM -0700, Stephen Warren wrote:
> On 02/14/2013 12:54 AM, Thierry Reding wrote:
> > Boot script support brings Medcom-Wide in line with other Tegra boards.
> > In order to enable booting a Linux kernel with initial ramdisk, also add
> > support
Move the nand-controller node to the tegra20-tamonten.dtsi so that it
can be shared between all derived boards.
Signed-off-by: Thierry Reding
---
This depends on Tom's "Tegra: MMC: Add DT support for MMC to T20 boards"
patches.
board/avionic-design/dts/tegra20-tam
Boot script support brings Plutux in line with other Tegra boards. In
order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding
---
include/configs/plutux.h | 31 +++
1 file changed, 19
Boot script support brings TEC in line with other Tegra boards. To
enable booting a Linux kernel with initial ramdisk, also include support
for the new FIT image type.
Signed-off-by: Thierry Reding
---
include/configs/tec.h | 23 +++
1 file changed, 11 insertions(+), 12
Boot script support brings Medcom-Wide in line with other Tegra boards.
In order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding
---
include/configs/medcom-wide.h | 34 --
1 file
|1 +
> 26 files changed, 815 insertions(+), 261 deletions(-)
> create mode 100644 board/avionic-design/dts/tegra20-tamonten.dtsi
The series,
Tested-by: Thierry Reding
on TEC and Medcom-Wide. I don't currently have access to a Plutux, but
On Wed, Feb 13, 2013 at 02:44:49PM -0700, Tom Warren wrote:
> Tamonten boards (medcom-wide, plutux, and tec) use a different/new
> dtsi file w/common settings.
>
> Signed-off-by: Tom Warren
> Acked-by: Thierry Reding
> ---
> v3: new
>
> board/avionic-design/dts/t
On Tue, Feb 12, 2013 at 01:19:18PM -0700, Stephen Warren wrote:
> On 02/12/2013 03:41 AM, Thierry Reding wrote:
> ...
> > So it turned out that I need to touch U-Boot anyway, so I decided
> > to give this a spin. I noticed that overriding
> > CONFIG_ARCH_DEVICE_TREE from
On Tue, Feb 12, 2013 at 11:41:09AM +0100, Thierry Reding wrote:
> On Tue, Feb 12, 2013 at 07:51:55AM +0100, Thierry Reding wrote:
> > On Mon, Feb 11, 2013 at 12:21:59PM -0700, Tom Warren wrote:
> > > Thierry/Lucas,
> > >
> > > On Mon, Feb 11, 2013 at 1
On Tue, Feb 12, 2013 at 07:51:55AM +0100, Thierry Reding wrote:
> On Mon, Feb 11, 2013 at 12:21:59PM -0700, Tom Warren wrote:
> > Thierry/Lucas,
> >
> > On Mon, Feb 11, 2013 at 12:11 PM, Thierry Reding
> > wrote:
> > > On Mon, Feb 11, 2013 at 10:56:33AM -
On Mon, Feb 11, 2013 at 12:21:59PM -0700, Tom Warren wrote:
> Thierry/Lucas,
>
> On Mon, Feb 11, 2013 at 12:11 PM, Thierry Reding
> wrote:
> > On Mon, Feb 11, 2013 at 10:56:33AM -0700, Tom Warren wrote:
> >> Lucas,
> >>
> >> On Mon, Feb 11, 2013 a
On Mon, Feb 11, 2013 at 10:56:33AM -0700, Tom Warren wrote:
> Lucas,
>
> On Mon, Feb 11, 2013 at 10:28 AM, Lucas Stach wrote:
> > Hi Tom,
> >
> > Am Montag, den 11.02.2013, 10:17 -0700 schrieb Tom Warren:
> >> Linux dts files were used for those boards that didn't already
> >> have sdhci info pop
ted anything
> but Seaboard.
>
> Tom Warren (2):
> Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files
> Tegra: MMC: Add DT support to MMC driver for all T20 boards
I've tested on TEC only, but since Medcom-Wide and Plutux are also based
on Tamonten they should b
The TEC ships with a 7" LCD panel that provides a resolution of 800x480
pixels. Add a corresponding panel description to the device tree and
enable LCD support in the configuration.
Signed-off-by: Thierry Reding
---
board/avionic-design/dts/tegra20-tec.dts
The Medcom-Wide has a 15" LCD panel with a resolution of 1366x768
pixels. Add a corresponding panel description to the device tree and
enable LCD support in the configuration.
Signed-off-by: Thierry Reding
---
board/avionic-design/dts/tegra20-medcom-wide.dts
ed is Seaboard, which runs at a 1366x768
resolution. As it happens this is the maximum resolution supported and
also the default that is used to initialize the framebuffer before the
configuration from DT is available.
Signed-off-by: Thierry Reding
---
drivers/video/tegra.c | 4 ++--
1 file chang
gt; cc: Stefan Roese
> cc: Tom Rini
> cc: Wolfgang Denk
> cc: Thierry Reding
> cc: Tom Warren
> cc: Stephen Warren
> cc: Stefano Babic
> ---
> include/configs/lwmon5.h |1 -
> include/configs/mcx.h|1 -
> include/configs/omap3_b
t to me.
I've tested this on TEC, on top of Tom's tegra/next branch. Without the
patch, U-Boot hangs right after:
Loading Device Tree to 010f9000, end 010ff2d4 ... OK
With the patch applied the system boots to the login prompt, so:
Tested-by: Thierry Reding
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