| \
+ HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
What was so special about the 8349ITX that icache() didn't work?
You're changing the HDI0 values for all of the 83xx boards, but AFAIK,
only the ITX had this problem.
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) || defined(CONFIG_MPC83xx)
icache_enable (); /* it's time to enable the instruction cache */
#endif
Kim references the ITX in this patch, but I don't see how the problem
I just described is fixed.
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causes U-Boot to hang or crash.
Therefore, I don't think any 83xx cache-related patch is complete
until MPC8349ITX.h includes CONFIG_MPC83xx.
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Modify print_size() so that it can accept numbers larger than 4GB on 32-bit
systems.
Add support for display terabyte, petabyte, and exabyte sizes. Change the
output to use International Electrotechnical Commission binary prefix standard.
Signed-off-by: Timur Tabi ti...@freescale.com
Modify print_size() so that it can accept numbers larger than 4GB on 32-bit
systems.
Add support for display terabyte, petabyte, and exabyte sizes. Change the
output to use International Electrotechnical Commission binary prefix standard.
Signed-off-by: Timur Tabi ti...@freescale.com
to
disassociate this function from the size of a physical address.
Signed-off-by: Timur Tabi ti...@freescale.com
---
lib/display_options.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/display_options.c b/lib/display_options.c
index 2dc2567..08a7914 100644
--- a/lib
On Fri, Apr 9, 2010 at 3:10 PM, Wolfgang Denk w...@denx.de wrote:
Dear Timur Tabi,
In message 1269990179-23666-1-git-send-email-ti...@freescale.com you wrote:
In print_size(), the math that calculates the fractional remainder of a
number
used the same integer size as a physical address
on it now. I did notice something odd, though. The
strings for sizes are GB, MB, and kB. Why is the k lowercase?
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that K=1024 when talking about memory sizes, but whatever)
I've never seen K=1000 and k=1024. Then why don't we do mB instead of MB?
By your logical, M=100 and m=1048576
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Wolfgang Denk wrote:
We should use standardized names now, i. e. GiB, MiB, KiB, etc.
Ugh. I'm not sure everyone recognizes those acronyms. I'm expecting a lot of
people to say, What the hell is MiB? Men in Black?
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honestly believe that there was no
confusion and that the introduction of KiB and its ilk just makes things worse,
not better. No one is going to compare memory sizes in kilobytes with
distances in kilometers and get confused.
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nor 1.44
MiB.
Let's use the official standard units, please. We may not like them,
but at least they will not cause a $125 million Mars orbiter to
crash...
Alright.
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Modify print_size() so that it can accept numbers larger than 4GB on 32-bit
systems.
Add support for display terabyte, petabyte, and exabyte sizes. Change the
output to use International Electrotechnical Commission binary prefix standard.
Signed-off-by: Timur Tabi ti...@freescale.com
Modify print_size() so that it can accept numbers larger than 4GB on 32-bit
systems.
Add support for display terabyte, petabyte, and exabyte sizes. Change the
output to use International Electrotechnical Commission binary prefix standard.
Signed-off-by: Timur Tabi ti...@freescale.com
Modify print_size() so that it can accept numbers larger than 4GB on 32-bit
systems.
Add support for display terabyte, petabyte, and exabyte sizes. Change the
output to use International Electrotechnical Commission binary prefix standard.
Signed-off-by: Timur Tabi ti...@freescale.com
Wolfgang Denk wrote:
Dear Timur Tabi,
In message 1269990179-23666-2-git-send-email-ti...@freescale.com you wrote:
Modify print_size() so that it can accept numbers larger than 4GB on 32-bit
systems.
Signed-off-by: Timur Tabi ti...@freescale.com
---
include/common.h |2
-specific sized integers.
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On Wed, Apr 7, 2010 at 5:23 PM, Wolfgang Denk w...@denx.de wrote:
Applied, thanks.
Wolfgang, would you also please apply my two print_size() patches?
They're not 85xx-specific, but I posted them to this list around the
same time.
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On Thu, Apr 8, 2010 at 6:32 PM, Dave Liu dave...@freescale.com wrote:
+#if defined(CONFIG_FSL_SATA_V2) defined(CONFIG_FSL_SATA_ERRATUM_A001)
Is there ever a situation where CONFIG_FSL_SATA_ERRATUM_A001 is
defined but CONFIG_FSL_SATA_V2 is not defined?
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direct writes and then follow-up with a sync(), as long as he
comments it?
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thing here.
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for ppcDWstore:
.globl ppcDWstore
ppcDWstore:
lfd 1, 0(r4)
stfd1, 0(r3)
blr
I just don't understand why it exists.
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On Wed, Apr 7, 2010 at 10:17 AM, Michael Zaidman
michael.zaid...@gmail.com wrote:
This is the fastest way to copy 64 bit words.
Of course, DW==double word. I should drink more coffee.
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why you're not using I/O
accessors. At this point, I'm not 100% clear whether the use of
volatile is okay.
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does this:
static inline void sync(void)
{
__asm__ __volatile__ (sync : : : memory);
}
The memory tells the compiler that this function is a memory
barrier, which means it won't try to reorder any reads/writes *after*
the sync.
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On Fri, Apr 2, 2010 at 8:49 AM, Michael Zaidman
michael.zaid...@gmail.com wrote:
+inline static void ecc_clear(volatile ddr83xx_t *ddr)
Please use I/O accessors instead of volatile.
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a register dedicated
for this purpose. Because the ngPIXIS is so different from the previous PIXIS,
a new file is introduced: ngpixis.c.
Also update the P2020DS checkboard() function to use the new macros defined
in the header file.
Signed-off-by: Timur Tabi ti...@freescale.com
---
board/freescale
to make
it easier for specific boards to support variations in the PIXIS registers
sets. No current boards appears to need this feature.
Fix the definition of CONFIG_SYS_PIXIS_VBOOT_MASK for the MPC8610 HPCD.
Apparently, pixis_reset altbank has never worked on this board.
Signed-off-by: Timur Tabi ti
().
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to
disassociate this function from the size of a physical address.
Signed-off-by: Timur Tabi ti...@freescale.com
---
include/common.h |2 +-
lib_generic/display_options.c |5 ++---
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/include/common.h b/include/common.h
.
I'll test 5.5GB and see what it does.
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On Wed, Mar 17, 2010 at 5:39 PM, Timur Tabi ti...@freescale.com wrote:
Refactor and document the Freescale PIXIS code, used on most 85xx and 86xx
boards. This makes the code easier to read and more flexible.
This patch breaks all 5121, because I forgot to modify diu.c. I'll
post a new version
.
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to
disassociate this function from the size of a physical address.
Signed-off-by: Timur Tabi ti...@freescale.com
---
include/common.h |2 +-
lib_generic/display_options.c |6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/common.h b/include/common.h
, there's a lot of value in
being able to print 4GB numbers on a 32-bit system, and it seems silly to make
two patches. I'll post a new patch, and Wolfgang can decide what he wants.
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to
disassociate this function from the size of a physical address.
Signed-off-by: Timur Tabi ti...@freescale.com
---
lib_generic/display_options.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib_generic/display_options.c b/lib_generic/display_options.c
index 2dc2567
Modify print_size() so that it can accept numbers larger than 4GB on 32-bit
systems.
Signed-off-by: Timur Tabi ti...@freescale.com
---
include/common.h |2 +-
lib_generic/display_options.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/common.h
it
tell Linux that we have 1.5GB of DDR.
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four BATS on the MPC8641 HPCN.
Do we want to tell customers that U-Boot/Linux only supports power-of-two sizes
of DDR?
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with
the issue on both 86xx/44x/85xx
I don't know about 44x, but like I said, I don't think it's a problem in 85xx,
because we use up to 8 TLBs to map DDR, which is more than enough to cover all
memory size possibilities.
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know. But please add a comment to the changelog
and/or source code that it will limit DDR for U-Boot and Linux to the next
lowest power of two.
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couldn't glean
whether we need the M bit set to make DMA work.
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sensical, and if you've got to change
the patch, anyway, we might as well clean this up.
I used a spreadsheet to help me figure out the algorithm, so I wouldn't say
that 2 is more sensical, but I don't really care either way. I don't see
how it improves the readability, though.
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).
Signed-off-by: Timur Tabi ti...@freescale.com
---
board/freescale/mpc8610hpcd/mpc8610hpcd.c |2 +
board/freescale/mpc8641hpcn/mpc8641hpcn.c |2 +
cpu/mpc86xx/cpu.c | 44 +
include/asm-ppc/mmu.h |4 ++-
include
prefer to see
symmetry here.
I used KB to keep the sizes of numbers small. The smallest value is
128KB, so it's not *that* arbitrary.
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| BATU_VP)
-#define CONFIG_SYS_IBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE )
-#define CONFIG_SYS_IBAT0U CONFIG_SYS_DBAT0U
+#define CONFIG_SYS_IBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE)
Why do we need BATL_MEMCOHERENCE on 8641 but not on 8610?
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that provides a
real fix.
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On Wed, Mar 17, 2010 at 5:39 PM, Timur Tabi ti...@freescale.com wrote:
Refactor and document the Freescale PIXIS code, used on most 85xx and 86xx
boards. This makes the code easier to read and more flexible.
Kumar, please pick this up for the next merge window. Thanks.
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a register dedicated
for this purpose. Because the ngPIXIS is so different from the previous PIXIS,
a new file is introduced: ngpixis.c.
Also update the P2020DS checkboard() function to use the new macros defined
in the header file.
Signed-off-by: Timur Tabi ti...@freescale.com
---
board/freescale
CONFIG_FSL_PIXIS 1 /* use common PIXIS code */
+#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */
Please use TABs for vertical alignment. Please fix globally.
Ok.
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the diu driver to do so.
Can you be more specific? What does the DIU driver do wrong?
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CONFIG_HAS_DATAFLASH.
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Wolfgang Denk wrote:
Dear Timur Tabi,
In message ed82fe3e1003050915r6e677102mb47a448293e62...@mail.gmail.com you
wrote:
Can someone tell me what CONFIG_HAS_DATAFLASH does?
I know this sounds like an act of darin, but how about having a look
at the README ?
[And I really wonder why
,
you can't access flash. CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS will allow the
saveenv command to continue working under this situation.
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1FFBE5A8 1FFC11F8
1FFA7338 1FF9F568
machine check
My guess is that the machine check and the -2 error are related. Does
anyone have a clue what the problem really is?
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= print hdbootarg
hdbootarg=setenv bootargs root=$rfsdev console=$consoledev,$baudrate
$othbootargs $single
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Joakim Tjernlund wrote:
+#ifdef CONFIG_FSL_I2C_CUSTOM_FDR
+ fdr = CONFIG_FSL_I2C_CUSTOM_FDR;
+ speed = i2c_clk / divider; /* Fake something */
How about setting 'speed' to CONFIG_SYS_I2C_SPEED?
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that lets you change the speed. Otherwise, the code will have no idea what
speed the bus is really running at.
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Joakim Tjernlund wrote:
No, the impact on speed from DFSR is pretty small so it will
be close enough.
How small?
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the value. The table is
actually derived from the same algorithm.
The problem with the table is that it does not allow for flexibility in
choosing dfsr. When I implemented the table code, I did not think that this
was a problem, but apparently it is.
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now. Sorry.
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that computed the values of
fdr/dfsr. I nack'd that patch because I thought the algorithm was too
convoluted, but perhaps what we really need is a combination of sorts. The
code should read the value of DFSR from the register, and then calculate an
appropriate FDR to go with it.
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to change the code.
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that DFSR and FDR are just two values that work together to create a
divider. Is there something special about DFSR?
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of DFSR and FDR. The values of DFSR==22
are for frequencies that are normally not published.
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Joakim Tjernlund wrote:
From AN2919, chap. 4.1:
C = 50*T, C is dfsr and T is i2c_period in nano seconds.
Argh, my copy of AN2919 is old! Mine doesn't have any of this stuff in it.
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, I2C_WRITE_BIT, 0))
return -1;
if (__i2c_write(a[4 - alen], alen) != alen)
return -1;
and so on.
i = 0; /* No error so far */
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LAW-mapped memory
right away might fail.
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always have been misinterpeted.
I think the original code was correct, because it was counting clock ticks.
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Peter Tyser wrote:
If this is the case, the timeout should be the maximum (or reasonable
maximum) time an I2C transaction could take.
How long is that? Is one millisecond good enough?
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is happier with 500 is a mystery to me.
Also, should we be using the same value for the timeout in i2c_wait4bus() and
i2c_wait()? It looks like i2c_wait() should have a much shorter timeout than
i2c_wait4bus()?
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After programming a new LAW, we should read-back the LAWAR register so that
we sync the writes. Otherwise, code that attempts to use the new LAW-mapped
memory might fail.
Signed-off-by: Timur Tabi ti...@freescale.com
---
drivers/misc/fsl_law.c |3 ++-
1 files changed, 2 insertions(+), 1
On Fri, Sep 4, 2009 at 5:05 PM, Timur Tabiti...@freescale.com wrote:
After programming a new LAW, we should read-back the LAWAR register so that
we sync the writes. Otherwise, code that attempts to use the new LAW-mapped
memory might fail.
Signed-off-by: Timur Tabi ti...@freescale.com
Just
I2C_TIMEOUT 1000
Surely, one millisecond is not too long of a timeout?
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that any of Freescale's 8[356]xx boards can't
handle a large I2C block write of about 50 bytes or so?
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Anton Vorontsov wrote:
p.s. Timur, since the patch has changed, I couldn't preserve your
previous Ack.
I'm okay with this version, too.
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after any field
is changed, so that the CRC is always correct.
Signed-off-by: Timur Tabi ti...@freescale.com
---
board/freescale/common/sys_eeprom.c | 81 +--
1 files changed, 49 insertions(+), 32 deletions(-)
diff --git a/board/freescale/common/sys_eeprom.c
b
Wolfgang? Are you okay with this part of my patch?
On Wed, Aug 19, 2009 at 9:40 AM, Kumar Galaga...@kernel.crashing.org wrote:
On Aug 18, 2009, at 5:28 PM, Timur Tabi wrote:
The mac id command took a 4-character parameter as the identifier
string.
However, for any given board, only one
.
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Unless you're talking about the summary. I figured the changes were
harmless and just added them as a freebie. It's not worth submitting
a different patch for just these.
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The MPIC initialization code for Freescale e500 CPUs was not using I/O
accessors, and it was not issuing a read-back to the MPIC after setting mixed
mode. This may be the cause of a spurious interrupt on some systems.
Signed-off-by: Timur Tabi ti...@freescale.com
---
cpu/mpc85xx/interrupts.c
.
Signed-off-by: Timur Tabi ti...@freescale.com
The git summary should be 85xx: ... not e500: Kumar, please
amend the title if you apply this patch. Thanks.
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after any field
is changed, so that the CRC is always correct.
Signed-off-by: Timur Tabi ti...@freescale.com
---
board/freescale/common/sys_eeprom.c | 79 +--
lib_ppc/board.c |1 +
2 files changed, 48 insertions(+), 32 deletions(-)
diff
The Intel E1000 driver was making assumptions about the relationship between
some virtual, physical, and PCI addresses.
Also fix some bad usage of the DEBUGOUT macro
Signed-off-by: Timur Tabi ti...@freescale.com
---
drivers/net/e1000.c | 17 +
1 files changed, 9 insertions
-off-by: Timur Tabi ti...@freescale.com
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feels wrong.
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web page would allow other people to tag their
patches for you.
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was going to review this patch, but it's not in his 'net' git repository.
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to fix the bug that u-boot and kernel can not
smoothly work because of insufficient DDR2 chip output strength.
The setting of DDR2 output strength is changed from reduced to full
status.
You forgot a Signed-off-by: line here.
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after it's
been approved here.
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no longer need to define it.
The _IO_BASE macro is also automatically defined to 0 if it isn't already set,
so there's no need to define that macro either in the board configuration
files.
Signed-off-by: Timur Tabi ti...@freescale.com
Acked-by: Nobuhiro Iwamatsu iwama...@nigauri.org
Acked
2009/6/19 André Schwarz andre.schw...@matrix-vision.de:
MVBLM7 is mpc8343 ... please apply your patch.
I posted another version of my patch that include MVBLM7. Please ACK
that patch.
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Timur Tabi
Linux kernel developer at Freescale
___
U-Boot
Kim Phillips wrote:
-#define _IO_BASE0xfe00 /* points to PCI I/O space
*/
-
but the PN62 doesn't set it to 0!
Doh! I don't know how I missed that.
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Timur Tabi
Linux kernel developer at Freescale
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to define that macro either in the board configuration files.
Signed-off-by: Timur Tabi ti...@freescale.com
Acked-by: Nobuhiro Iwamatsu iwama...@nigauri.org
Acked-by: Andy Fleming aflem...@freescale.com
Acked-by: Andre Schwarz andre.schw...@matrix-vision.de
---
v3: removed the change for PN62.h, which
to define that macro either in the board configuration files.
Signed-off-by: Timur Tabi ti...@freescale.com
---
include/configs/HIDDEN_DRAGON.h |4 +---
include/configs/M5253DEMO.h |1 -
include/configs/M5253EVBE.h |1 -
include/configs/M54455EVB.h |1 -
include/configs
Kim Phillips wrote:
it's missing other boards like the MVBLM7, mpc7448hpc2...
I'm not familiar with those boards, so I didn't touch them. If you give me a
list of which boards I should add, I can post an updated version of the patch.
--
Timur Tabi
Linux kernel developer at Freescale
are:
HIDDEN_DRAGON.h
M5253DEMO.h
M5253EVBE.h
M54455EVB.h
mpc7448hpc2.h
MVBLM7.h
PN62.h
r2dplus.h
I think all but the last are PPC boards. Should I include those?
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Timur Tabi
Linux kernel developer at Freescale
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Ok, I need a consensus. It's not clear to me if I should post a patch that
1) Updates only FSL boards
2) Updates all PPC boards
3) Updates all boards
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Timur Tabi
Linux kernel developer at Freescale
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http
#define _IO_BASE0x
#define KSEG1ADDR(x)(x)
So PPC isn't the only architecture affected by this. However, since I don't
have an SH cross-compiler, I can't test it.
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Timur Tabi
Linux kernel developer at Freescale
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