Re: [PATCH 1/2] mtd: spi-nor-core: allow overriding 4-byte OPCODE support

2024-09-12 Thread Tudor Ambarus
On 9/12/24 11:07 AM, Robert Marko wrote: > On Tue, Sep 10, 2024 at 9:55 AM Tudor Ambarus wrote: >> >> Hiya, >> >> Please specify which linux commit this patch follows. It helps reviewers >> and gives credit to the linux author. > > Hi, > There isn&#x

Re: [PATCH 1/4] mtd: spi-nor: Rework set_4byte()

2024-09-10 Thread Tudor Ambarus
On 08.08.2024 09:00, tkuw584...@gmail.com wrote: > From: Takahiro Kuwano > > Synchronize set_4byte() with Linux v6.10 as much as possible. Let's aim for spi-nor/for-v6.12. > > Introduce {nor, params}->set_4byte_addr_mode(). > The params->set_4byte_addr_mode is initialized with one of the >

Re: [PATCH 2/2] mtd: spi-nor-core: add 4-byte OPCODE support for Winbond W25Q256JV

2024-09-10 Thread Tudor Ambarus
On 25.04.2024 17:36, Robert Marko wrote: > Winbond W25Q256FV and W25Q256JV share the same JEDEC ID, but only > W25Q256JV fully supports 4-byte OPCODE-s. > > In order to differentiate between them we can use the SFDP header version > and apply a fixup post BFPT. > > Based on upstream Linux comm

Re: [PATCH 2/4] mtd: spi-nor: Set the 4-Byte Address Mode method based on SFDP data

2024-09-10 Thread Tudor Ambarus
On 08.08.2024 09:00, tkuw584...@gmail.com wrote: > From: Takahiro Kuwano > > This patch partially ports the Linux commit: > 4e53ab0c292d ("mtd: spi-nor: Set the 4-Byte Address Mode method based on >SFDP data") > > BFPT[DWORD(16)] defines the methods to enter and exit the 4-Byt

Re: [PATCH 1/2] mtd: spi-nor-core: allow overriding 4-byte OPCODE support

2024-09-10 Thread Tudor Ambarus
Hiya, Please specify which linux commit this patch follows. It helps reviewers and gives credit to the linux author. Thanks, ta

Re: [PATCH 4/4] mtd: spi-nor: add generic flash driver

2024-09-10 Thread Tudor Ambarus
On 08.08.2024 09:00, tkuw584...@gmail.com wrote: > From: Takahiro Kuwano > > Our SFDP parsing is everything we need to support all basic operations > of a flash device. If the flash isn't found in our in-kernel flash > database, gracefully fall back to a driver described solely by its SFDP > t

Re: [PATCH 3/4] mtd: spi-nor: Remove SPI_NOR_SKIP_SFDP flag

2024-09-10 Thread Tudor Ambarus
On 08.08.2024 09:00, tkuw584...@gmail.com wrote: > From: Takahiro Kuwano > > This flag is not used in INFO table so checking info->flags has no > effect. > > Signed-off-by: Takahiro Kuwano this patch can be send on its own I guess. Maybe Jagan can take it now: Revie

Re: [PATCH] mtd: spi-nor-ids: Deduplicate w25q16dw entry

2024-09-09 Thread Tudor Ambarus
UAL_READ | SPI_NOR_QUAD_READ) > + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | > + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) you probably chose to keep the second entry to have some sort of alphabetical order. I'd keep the first entry as the second entry was never used anyway, then reorder alphabetically if one cares. Just nitpicks so fine by me either way: Reviewed-by: Tudor Ambarus > }, > { > INFO("w25q32dw", 0xef6016, 0, 64 * 1024, 64,

Re: [PATCH] mtd: spi-nor-ids: Add NO_CHIP_ERASE flag to Infineon 2Gb parts

2024-09-09 Thread Tudor Ambarus
}, > { INFO("s28hs01gt", 0x345b1b, 0, 256 * 1024, 512, > SPI_NOR_OCTAL_DTR_READ) }, > - { INFO("s28hs02gt", 0x345b1c, 0, 256 * 1024, 1024, > SPI_NOR_OCTAL_DTR_READ) }, > + { INFO("s28hs02gt", 0x345b1c, 0, 256 * 1024, 10

Re: [PATCH] mtd: spi-nor-ids: Add support for S28HS256T

2024-09-09 Thread Tudor Ambarus
On 30.08.2024 08:00, tkuw584...@gmail.com wrote: > From: Takahiro Kuwano > > Infineon S28HS256T is 256Mb Octal SPI device which has same > functionalities with 512Mb and 1Gb parts. > > Signed-off-by: Takahiro Kuwano > Reviewed-by: Pratyush Yadav Revie

Re: [PATCH] mtd: spi-nor-ids: Deduplicate mx25u25635f entry

2024-09-09 Thread Tudor Ambarus
an directly revert the offending commit as it dropped support for the 4b opcodes. Looks good anyway: Reviewed-by: Tudor Ambarus > Signed-off-by: Marek Vasut > Reviewed-by: Michal Simek > --- > Cc: Andre Przywara > Cc: Ashok Reddy Soma > Cc: Dhruva Gole > Cc: Jagan Tek

Re: [PATCH v2 1/6] mtd: ubi: Do not zero out EC and VID on ECC-ed NOR flashes

2024-04-29 Thread Tudor Ambarus
On 4/29/24 15:17, Pratyush Yadav wrote: > On Thu, Apr 25 2024, tkuw584...@gmail.com wrote: > >> From: Takahiro Kuwano > > I wonder how authorship should work for such patches. Patches 1, 2, and > 6 in this series are very close to what my patches did for Linux. So I > wonder who should get au

Re: [PATCH v2 3/6] mtd: spi-nor: Check nor->info before setting macronix_octal_fixups

2024-04-25 Thread Tudor Ambarus
amp; > + nor->info->flags & SPI_NOR_OCTAL_DTR_READ) > + nor->fixups = ¯onix_octal_fixups; we still have the mfr checks in u-boot, sigh. sounds sane: Acked-by: Tudor Ambarus > #endif /* SPI_FLASH_MACRONIX */ > } >

Re: [PATCH v2 5/6] mtd: spi-nor: Call spi_nor_post_sfdp_fixups() only after spi_nor_parse_sfdp()

2024-04-25 Thread Tudor Ambarus
ch follows the upstream linux commit: > 5273cc6df984("mtd: spi-nor: core: Call spi_nor_post_sfdp_fixups() only > when SFDP is defined") this shall be the first information in the commit message. Acked-by: Tudor Ambarus > > Signed-off-by: Takahiro Kuwano > --- > d

Re: [PATCH v2 6/6] mtd: spi-nor: Set ECC unit size to MTD writesize in Infineon SEMPER flashes

2024-04-25 Thread Tudor Ambarus
sure multi-pass > programming is not attempted on the flash. > > Signed-off-by: Takahiro Kuwano Acked-by: Tudor Ambarus > --- > drivers/mtd/spi/spi-nor-core.c | 14 ++ > 1 file changed, 14 insertions(+) > > diff --git a/drivers/mtd/spi/spi-nor-core.c b

Re: [PATCH v2 4/6] mtd: spi-nor: Replace default_init() hook with late_init()

2024-04-25 Thread Tudor Ambarus
enable() and/or setup() hooks that called later on. > Just moving those to late_init() does not change functionality. > > Suggested-by: Tudor Ambarus > Signed-off-by: Takahiro Kuwano Acked-by: Tudor Ambarus

Re: [PATCH 3/4] mtd: spi-nor-core: Rework default_init() to take flash_parameter

2024-04-15 Thread Tudor Ambarus
On 4/15/24 08:09, Takahiro Kuwano wrote: > Hi Tudor, Hi! > > On 4/15/2024 3:47 PM, Tudor Ambarus wrote: >> >> >> On 4/15/24 05:33, tkuw584...@gmail.com wrote: >>> From: Takahiro Kuwano >>> >>> default_init() fixup hook should be used t

Re: [PATCH 0/4] mtd: Make sure UBIFS does not do multi-pass page programming on flashes that don't support it

2024-04-15 Thread Tudor Ambarus
On 4/15/24 05:33, tkuw584...@gmail.com wrote: > From: Takahiro Kuwano > > This series is equivalent to the one for Linux MTD submitted by > Pratyush Yadav. > > https://patchwork.ozlabs.org/project/linux-mtd/list/?series=217759&state=* Ah, I see you specified it here. I'd argue it's better to

Re: [PATCH 4/4] mtd: spi-nor: Set ECC unit size to MTD writesize in Infineon SEMPER flashes

2024-04-15 Thread Tudor Ambarus
On 4/15/24 05:33, tkuw584...@gmail.com wrote: > diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c > index 8f371a5213..773afd4040 100644 > --- a/drivers/mtd/spi/spi-nor-core.c > +++ b/drivers/mtd/spi/spi-nor-core.c > @@ -3459,6 +3459,13 @@ static void s25_default_init(s

Re: [PATCH 2/4] mtd: spi-nor: Allow flashes to specify MTD writesize

2024-04-15 Thread Tudor Ambarus
it. > > Signed-off-by: Takahiro Kuwano Please specify when a patch follows linux upstream. This follows the following upstream linux commit: afd473e85827 ("mtd: spi-nor: core: Allow flashes to specify MTD writesize") Acked-by: Tudor Ambarus

Re: [PATCH 3/4] mtd: spi-nor-core: Rework default_init() to take flash_parameter

2024-04-15 Thread Tudor Ambarus
On 4/15/24 05:33, tkuw584...@gmail.com wrote: > From: Takahiro Kuwano > > default_init() fixup hook should be used to initialize flash parameters > when its information is not provided in SFDP. To support that case, it > needs to take flash_parameter structure like as other hooks. > > Signed-

Re: [PATCH 1/4] mtd: ubi: Do not zero out EC and VID on ECC-ed NOR flashes

2024-04-15 Thread Tudor Ambarus
the author. If something breaks all parties can be involved. This patch replicates the following upstream linux commit: f669e74be820 ("ubi: Do not zero out EC and VID on ECC-ed NOR flashes") Acked-by: Tudor Ambarus Cheers, ta

Re: [PATCH v2 2/2] mtd: spi-nor-core: Make CFRx reg fields generic

2023-01-20 Thread Tudor Ambarus
-by: Tudor Ambarus Signed-off-by: Takahiro Kuwano Reviewed-by: Tudor Ambarus --- drivers/mtd/spi/spi-nor-core.c | 8 include/linux/mtd/spi-nor.h| 8 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor

Re: [PATCH v2 1/2] mtd: spi-nor-core: Consider reserved bits in CFR5 register

2023-01-20 Thread Tudor Ambarus
register. This is useful for both readability and future possible addition of Octal STR mode support. Fixes: ea9a22f7e79c ("mtd: spi-nor-core: Add support for Cypress Semper flash") Suggested-by: Tudor Ambarus Signed-off-by: Takahiro Kuwano Reviewed-by: Tudor Ambarus --- include/lin

[PATCH 1/3] Revert "sama5d3: Fix Galois Field Table offsets"

2021-05-21 Thread Tudor Ambarus
t any bitflips. Restoring the offsets as they were before, makes the PMECC on sama5d3x capable of correcting bitflips. Fixes: 786f888b74 ("sama5d3: Fix Galois Field Table offsets") Signed-off-by: Tudor Ambarus --- arch/arm/mach-at91/include/mach/sama5d3.h | 4 ++-- 1 file changed, 2 i

[PATCH 2/3] configs: sam9x60ek: Enable NAND on mmc defconfig

2021-05-21 Thread Tudor Ambarus
Enable NAND on mmc defconfig for greater flexibility and for consistency reasons. All our other boards that have a NAND flash integrated, enable NAND regardless of the type of the defconfig. Signed-off-by: Tudor Ambarus --- configs/sam9x60ek_mmc_defconfig | 7 +++ 1 file changed, 7

[PATCH 3/3] nand: atmel: Correct bitflips in erased pages

2021-05-21 Thread Tudor Ambarus
nd other u-boot mtd drivers has been adopted, where a heuristic implemented by nand_check_erased_ecc_chunk() is used in order to detect and correct empty sectors. Tested with sama5d3_xplained and sam9x60-ek. Signed-off-by: Kai Stuhlemmer (ebee Engineering) Tested-by: Tudor Ambarus [ta:

[PATCH 3/4] sama5d3: Fix Galois Field Table offsets

2021-01-08 Thread Tudor Ambarus
hing is fine. Fixes: 3225f34e5c ("ARM: atmel: add sama5d3xek support") Signed-off-by: Tudor Ambarus --- arch/arm/mach-at91/include/mach/sama5d3.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-at91/include/mach/sama5d3.h b/arch/arm/mach-at91/include/m

[PATCH 4/4] sam9x60.h: Fix Galois Field Table offsets

2021-01-08 Thread Tudor Ambarus
ned-off-by: Kai Stuhlemmer (ebee Engineering) [ta: update commit message] Signed-off-by: Tudor Ambarus --- arch/arm/mach-at91/include/mach/sam9x60.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-at91/include/mach/sam9x60.h b/arch/arm/mach-at91/include/mach

[PATCH 2/4] configs: at91: Fix wrong definitions for CONFIG_PMECC_CAP

2021-01-08 Thread Tudor Ambarus
at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig") Signed-off-by: Tudor Ambarus --- configs/sama5d36ek_cmp_mmc_defconfig | 1 + configs/sama5d36ek_cmp_nandflash_defconfig | 1 + configs/sama5d36ek_cmp_spiflash_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 1

[PATCH 1/4] configs: at91: Fix the involuntarily disablement of NAND PMECC

2021-01-08 Thread Tudor Ambarus
store CONFIG_PMECC_CAP value. Fixes: 57f76c2a47 ("configs: at91: remove SPL_GENERATE_ATMEL_PMECC_HEADER from non-nand configs") Signed-off-by: Tudor Ambarus --- configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_spiflash_defconfig| 1 + configs/at91sam9x5ek

[PATCH 0/4] at91: Fix NAND PMECC on various SoCs/boards

2021-01-08 Thread Tudor Ambarus
nto u-boot NAND memory area, and then read back. PMECC could not correct the errors. With these everything is fine. Kai Stuhlemmer (ebee Engineering) (1): sam9x60.h: Fix Galois Field Table offsets Tudor Ambarus (3): configs: at91: Fix the involuntarily disablement of NAND PMECC configs: at91: