Add the latest 4000 MT/s DDR config generated by
Jacinto7_DDRSS_RegConfigTool Rev 0.11 for J722S , make it the
default config and update A53 default clock to 1.4 GHz matching
the default speed grade (K).
Signed-off-by: Vaishnav Achath
---
memtester logs on J722S EVM:
https
Hi Sughosh, Tom,
On 01/10/24 14:19, Sughosh Ganu wrote:
On Tue, 1 Oct 2024 at 11:37, Vaishnav Achath wrote:
Hi Tom,
On 21/09/24 08:09, Tom Rini wrote:
On Mon, 16 Sep 2024 20:50:23 +0530, Sughosh Ganu wrote:
Rework the logic to verify the load address so that address re-use is
not an
Hi Tom,
On 21/09/24 08:09, Tom Rini wrote:
On Mon, 16 Sep 2024 20:50:23 +0530, Sughosh Ganu wrote:
Rework the logic to verify the load address so that address re-use is
not an issue.
Note: To be applied on next, on top of
https://patchwork.ozlabs.org/project/uboot/patch/20240913073251.228652
ghosh Ganu
---
Note: To be applied on next, on top of
https://patchwork.ozlabs.org/project/uboot/patch/20240913073251.2286529-2-prasad.kumm...@amd.com/
Tested-by: Vaishnav Achath
net/tftp.c | 19 +--
1 file changed, 1 insertion(+), 18 deletions(-)
diff --git a/net/tf
y: Sughosh Ganu
---
Note: To be applied on next, on top of
https://patchwork.ozlabs.org/project/uboot/patch/20240913073251.2286529-2-prasad.kumm...@amd.com/
Tested-by: Vaishnav Achath
net/wget.c | 36 +---
1 file changed, 1 insertion(+), 35 deletions(-)
diff -
Hi Sughosh,
On 16/09/24 16:40, Sughosh Ganu wrote:
On Mon, 16 Sept 2024 at 16:07, Vaishnav Achath wrote:
Hi Sughosh,
On 16/09/24 14:53, Sughosh Ganu wrote:
On Mon, 16 Sept 2024 at 14:22, Vaishnav Achath wrote:
Hi Sughosh,
On 16/09/24 12:13, Sughosh Ganu wrote:
On Mon, 16 Sept 2024 at
Hi Sughosh,
On 16/09/24 11:59, Sughosh Ganu wrote:
On Mon, 16 Sept 2024 at 11:22, Vaishnav Achath wrote:
Hi Sughosh,
On 26/08/24 17:29, Sughosh Ganu wrote:
The current LMB API's for allocating and reserving memory use a
per-caller based memory view. Memory allocated by a caller can th
Hi Sughosh,
On 16/09/24 14:53, Sughosh Ganu wrote:
On Mon, 16 Sept 2024 at 14:22, Vaishnav Achath wrote:
Hi Sughosh,
On 16/09/24 12:13, Sughosh Ganu wrote:
On Mon, 16 Sept 2024 at 11:47, Vaishnav Achath wrote:
Hi Prasad,
On 13/09/24 13:02, Prasad Kummari wrote:
Added LMB API to
Hi Sughosh,
On 16/09/24 12:13, Sughosh Ganu wrote:
On Mon, 16 Sept 2024 at 11:47, Vaishnav Achath wrote:
Hi Prasad,
On 13/09/24 13:02, Prasad Kummari wrote:
Added LMB API to prevent SF command from overwriting reserved
memory areas. The current SPI code does not use LMB APIs for
loading
Hi Prasad,
On 13/09/24 13:02, Prasad Kummari wrote:
Added LMB API to prevent SF command from overwriting reserved
memory areas. The current SPI code does not use LMB APIs for
loading data into memory addresses. To resolve this, LMB APIs
were added to check the load address of an SF command and e
Hi Sughosh
On 26/08/24 17:29, Sughosh Ganu wrote:
The current LMB API's for allocating and reserving memory use a
per-caller based memory view. Memory allocated by a caller can then be
overwritten by another caller. Make these allocations and reservations
persistent using the alloced list data s
eported-by: Nishanth Menon
Signed-off-by: Vaishnav Achath
---
We started seeing boot failures since we have platforms that perform
mmc load for firmwares and subsequent tftp load for kernel to same
loadaddr, the reservation need not be permanent and is only to make
sure that the read is not overwrit
Update J722S Resource Management configs to the latest output
generated by K3 Resource Partitioning tool. Main change includes
allocating more BCDMA channels to A53 for CSI2RX to support
4 x CSIRX capture instance simultaneously.
Signed-off-by: Vaishnav Achath
---
Test logs (CSI capture + RM
;)
Signed-off-by: Vaishnav Achath
---
board/ti/j721e/evm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index d4e672a7ac..353422937e 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -111,6 +111,9 @@ static void __ma
platforms which does not explicitly disable the
hbmc node in board dts, thus disable hyperbus node by default.
Fixes: 297daac43afb ("arm: dts: k3-j721e-mcu-wakeup: Add HyperBus Controller
node")
Signed-off-by: Vaishnav Achath
---
Since this node is not present in corresponding upstr
will be sent separately,
but hyperbus and OSPI controller being active was also one of the issues
causing boot failure.
Changes were tested on J721E EVM and J721E SK for basic boot and hyperflash
functionality(EVM).
Vaishnav Achath (2):
arm: dts: k3-j721e-mcu-wakeup: Disable hyperbus controller
AC mode forces to read minimum 4 bytes
> + * which is unsupported on some flash devices during register
> + * reads, prefer STIG mode for such small reads.
> + */
> + if (!op->addr.nbytes ||
> + op->data.nbytes < CQSPI_STIG_D
Linux (drivers/mtd/spi-nor/sfdp.c).
Signed-off-by: Vaishnav Achath
---
drivers/mtd/spi/spi-nor-core.c | 34 --
1 file changed, 32 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 3b7c817c02..90d05da1d8 1
implement overrides for spl_spi_boot_bus() and spl_spi_boot_cs()
lookup functions according to bootmode selection, so as to support
both QSPI and OSPI boot using the same build.
Signed-off-by: Vaishnav Achath
Reviewed-by: Pratyush Yadav
---
V2->V3 : removed unnecessary spl_spi_boot
due to this limitation.
This commit adds lookup functions spl_spi_boot_bus()
and spl_spi_boot_cs for identifying the flash device based on the
selected boot device, when not overridden the lookup functions are
weakly defined in common/spl/spl_spi.c.
Signed-off-by: Vaishnav Achath
Reviewed-by
de for J721E,
suggested by Pratyush Yadav
Vaishnav Achath (2):
common: spl: spl_spi: add support for dynamic override of sf bus
arm: k3: j721e: add dynamic sf bus override support for j721e
arch/arm/mach-k3/j721e_init.c | 11 +++
arch/arm/mach-k3/sysfw-loader.c | 4 ++--
comm
Hi Heiko,
On 11/05/22 13:54, Heiko Schocher wrote:
Hello Achath,
On 11.05.22 08:03, Vaishnav Achath wrote:
Currently the SPI flash to load from is defined through the compile
time config CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS, this
prevents the loading of binaries from different SPI
due to this limitation.
This commit adds lookup functions spl_spi_boot_bus()
and spl_spi_boot_cs for identifying the flash device based on the
selected boot device, when not overridden the lookup functions are
weakly defined in common/spl/spl_spi.c.
Signed-off-by: Vaishnav Achath
---
common/spl
implement overrides for spl_spi_boot_bus() and spl_spi_boot_cs()
lookup functions according to bootmode selection, so as to support
both QSPI and OSPI boot using the same build.
Signed-off-by: Vaishnav Achath
---
arch/arm/mach-k3/j721e_init.c | 17 +
arch/arm/mach-k3/sysfw
device thus allowing platforms to override the SF_BUS
and SF_CS to load from the desired flash.
Changes tested on J721E for OSPI and QSPI boot.
V1->V2:
* drop unnecessary Kconfig option for SF bus override,
suggested by Heiko Schocher.
Vaishnav Achath (2):
common: spl: spl_spi: add supp
Hi Heiko,
On 09/05/22 12:49, Heiko Schocher wrote:
Hello Achat,
On 09.05.22 08:43, Vaishnav Achath wrote:
Currently the SPI flash to load from is defined through the compile
time config CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS, this
prevents the loading of binaries from different SPI
: mt35xu512aba (65536 Kbytes)
Signed-off-by: Vaishnav Achath
---
common/spl/spl_spi.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index cf3f7ef4c0..113a85bec9 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -162,6 +162,11 @@ static
implement overrides for spl_spi_boot_bus() and spl_spi_boot_cs()
lookup functions according to bootmode selection, so as to support
both QSPI and OSPI boot using the same build.
Also enable the CONFIG_SPL_DYNAMIC_SF_BUS_DETECT for j721e R5
and A72.
Signed-off-by: Vaishnav Achath
---
arch/arm
due to this limitation.
This commit adds lookup functions spl_spi_boot_bus()
and spl_spi_boot_cs for identifying the flash device based on the
selected boot devic, when not overridden the lookup functions are
weakly defined in common/spl/spl_spi.c.
Signed-off-by: Vaishnav Achath
---
common/spl
device thus allowing platforms to override the SF_BUS
and SF_CS to load from the desired flash.
Changes tested on J721E for OSPI and QSPI boot.
Vaishnav Achath (2):
common: spl: spl_spi: add support for dynamic detection of sf bus
arm: k3: j721e: enable dynamic sf bus detect support for j721e
add support for loading system firmware from hyperflash.
Signed-off-by: Vaishnav Achath
---
arch/arm/mach-k3/sysfw-loader.c | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c
index 5e48c36ccd
Enable HBMC and HyperFlash in R5SPL, A72 SPL and A72 U-Boot
Signed-off-by: Vaishnav Achath
---
configs/j721e_evm_a72_defconfig | 5 +
configs/j721e_evm_r5_defconfig | 14 ++
2 files changed, 19 insertions(+)
diff --git a/configs/j721e_evm_a72_defconfig b/configs
GPIO when checking
hypermux selection state:
* J7200 - hypermux sel connected to WKUP_GPIO0_6
* J721E - hypermux·sel·connected·to·WKUP_GPIO0_8
Signed-off-by: Vaishnav Achath
---
board/ti/j721e/evm.c | 57 +---
1 file changed, 54 insertions(+), 3 deletions
Define CONFIG_SYS_FLASH_BASE to indicate start address of
Flash memory
Signed-off-by: Vaishnav Achath
---
include/configs/j721e_evm.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index 2590ee6b01..91dc52b9fd 100644
--- a/include
add u-boot,dm-spl pre-relocation property to enable hbmc in SPL.
Signed-off-by: Vaishnav Achath
---
.../k3-j721e-common-proc-board-u-boot.dtsi| 24 +++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j721e
Add wkup_gpio pinmux setting which will be used for performing the
DT fixup for hbmc node according to mux selection state, on J721E
EVM, hypermux sel is tied to ·WKUP_GPIO0_8.
Signed-off-by: Vaishnav Achath
---
arch/arm/dts/k3-j721e-common-proc-board.dts | 11 +++
1 file changed, 11
J721e SoM as a 64MB HyperFlash on board. Add pinmux and DT node
for the same.
Signed-off-by: Vaishnav Achath
---
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 45 +++
1 file changed, 45 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
b/arch/arm/dts
J721e SoM as a 64MB HyperFlash on board. Add pinmux and DT node
for the same.
Signed-off-by: Vaishnav Achath
---
arch/arm/dts/k3-j721e-som-p0.dtsi | 32 +++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-som-p0.dtsi
b/arch/arm/dts/k3-j721e-som
Add DT node for HyperBus Memory Controller and hbmc-mux in the
FSS. hbmc-am654 driver uses syscon_get_regmap() call which fails
with current compatible setting.
Signed-off-by: Vaishnav Achath
---
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 20 +++-
1 file changed, 19 insertions
selection state similar to as done for J7200.
Changes were tested on J721E SR1.1 for Hyperflash and OSPI boot.
Thanks and Regards,
Vaishnav
Vaishnav Achath (9):
arm: dts: k3-j721e-mcu-wakeup: Add HyperBus Controller node
arm: dts: k3-j721e-som-p0: Add HyperFlash node
arm: dts: k3-j721e-r5
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