From: chenhui zhao
Signed-off-by: Zhao Chenhui
---
boards.cfg |1 +
include/configs/MPC8548CDS.h | 56 ++
2 files changed, 57 insertions(+), 0 deletions(-)
diff --git a/boards.cfg b/boards.cfg
index 65482ac..1b807cc 100644
--- a
.
Signed-off-by: Zhao Chenhui
---
replace the patch "powerpc/mpc8548cds: Fix config according to system address
map".
board/freescale/mpc8548cds/law.c| 31 +-
board/freescale/mpc8548cds/mpc8548cds.c |8 ++--
board/freescale/mpc8548cds/tlb.c
On Sat, Oct 08, 2011 at 03:02:18PM +0800, Zhao Chenhui wrote:
> On Fri, Oct 07, 2011 at 10:17:28AM -0500, Kumar Gala wrote:
> >
> > On Sep 13, 2011, at 2:15 AM, Zhao Chenhui wrote:
> >
> > > From: chenhui zhao
> > >
> > > - Fix conf
From: chenhui zhao
- Fix config according to system address map in the manual.
- Rework tlb and law tables.
- Remove unnecessary macros.
Signed-off-by: Zhao Chenhui
---
Changes for v2:
- Fixed typo in the comments of tlb.c
board/freescale/mpc8548cds/law.c| 19 +
board
On Fri, Oct 07, 2011 at 10:17:28AM -0500, Kumar Gala wrote:
>
> On Sep 13, 2011, at 2:15 AM, Zhao Chenhui wrote:
>
> > From: chenhui zhao
> >
> > - Fix config according to system address map in the manual.
> > - Rework tlb and law tables.
> > - Remove unn
From: chenhui zhao
The CDS uses PCICLK as SYSCLK. The PCICLK should be Hz or Hz.
Signed-off-by: Ebony Zhu
Signed-off-by: Zhao Chenhui
---
Changes for v2:
-rewrite the description.
-use strmhz().
board/freescale/common/cadmus.c |8
board/freescale
On Tue, Sep 13, 2011 at 03:18:59PM -0500, Timur Tabi wrote:
> Scott Wood wrote:
>
> > So you'll set the speed to if the actual speed is 6600?
>
> I think so.
>
> > Even if it's 3300, why force it to ?
>
> That's a good question. Since the patch doesn't explain why it's
On Tue, Sep 13, 2011 at 10:14:44PM +0200, Wolfgang Denk wrote:
> Dear Zhao Chenhui,
>
> In message <1315898131-27710-2-git-send-email-chenhui.z...@freescale.com> you
> wrote:
> ...
> > printf("PCI1: %d bit, %s MHz, %s\n",
> > (pci1
From: chenhui zhao
- Fix config according to system address map in the manual.
- Rework tlb and law tables.
- Remove unnecessary macros.
Signed-off-by: Zhao Chenhui
---
board/freescale/mpc8548cds/law.c| 19 +
board/freescale/mpc8548cds/mpc8548cds.c |8 ++--
board
receiver to an acceptable bias point.
Signed-off-by: Gong Chen
Signed-off-by: Zhao Chenhui
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |4
arch/powerpc/cpu/mpc85xx/ddr-gen2.c | 22 +-
arch/powerpc/include/asm/config_mpc85xx.h |1 +
3 files changed, 26
divider LCRR[CLKDIV].
Refer to the erratum LBIU3 of mpc8548.
Signed-off-by: Zhao Chenhui
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++
arch/powerpc/cpu/mpc85xx/cpu_init.c |3 +++
arch/powerpc/include/asm/config_mpc85xx.h |1 +
3 files changed, 7 insertions(+), 0
From: chenhui zhao
Signed-off-by: Zhao Chenhui
---
boards.cfg |1 +
include/configs/MPC8548CDS.h | 52 ++
2 files changed, 53 insertions(+), 0 deletions(-)
diff --git a/boards.cfg b/boards.cfg
index 8bf69e3..64a39f8 100644
--- a
From: chenhui zhao
-Increase the size of malloc space.
-Enable e1000 network card.
-Change the location of env address.
-Use hwconfig to turn off ECC.
Signed-off-by: Zhao Chenhui
---
include/configs/MPC8548CDS.h | 14 +++---
1 files changed, 11 insertions(+), 3 deletions(-)
diff
From: chenhui zhao
Erratum NMG_eTSEC129 (eTSEC86 in MPC8548 document) applies to some early
verion silicons. This workaround detects if the eTSEC Rx logic is properly
initialized, and reinitialize the eTSEC Rx logic.
Signed-off-by: Gong Chen
Signed-off-by: Zhao Chenhui
---
arch/powerpc/cpu
From: chenhui zhao
Align the output for PCI. Replace "PCI" with "PCI1".
Signed-off-by: Zhao Chenhui
---
board/freescale/mpc8548cds/mpc8548cds.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c
b/board/
From: chenhui zhao
Add board_eth_init(). PCIe network card is also supported.
Put RGMII init after tsec_eth_init().
Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3.
Signed-off-by: Ebony Zhu
Signed-off-by: Zhao Chenhui
---
board/freescale/mpc8548cds/mpc8548cds.c
From: chenhui zhao
Use Hz for 33MHz, Hz for 66MHz.
Signed-off-by: Ebony Zhu
Signed-off-by: Zhao Chenhui
---
board/freescale/common/cadmus.c |8
board/freescale/mpc8541cds/mpc8541cds.c |6 +++---
board/freescale/mpc8548cds/mpc8548cds.c |4
The function fsl_setup_hose clears the variable pci1_hose.
Set pci1_hose.config_table after it.
Signed-off-by: Zhao Chenhui
---
board/freescale/mpc8610hpcd/mpc8610hpcd.c | 11 +--
1 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
The function fsl_setup_hose clears the variable pci1_hose.
Set pci1_hose.config_table after it.
Signed-off-by: Zhao Chenhui
---
board/freescale/mpc8548cds/mpc8548cds.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c
b/board
Remove unnecessary or dead code/includes.
Signed-off-by: Zhao Chenhui
---
board/freescale/mpc8548cds/mpc8548cds.c |7 ---
1 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c
b/board/freescale/mpc8548cds/mpc8548cds.c
index 5ffae47
The function fsl_setup_hose clears the variable pci1_hose.
Set pci1_hose.config_table after it.
Signed-off-by: Zhao Chenhui
---
board/freescale/mpc8568mds/mpc8568mds.c | 11 +--
1 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/board/freescale/mpc8568mds/mpc8568mds.c
b
Convert the PCI base address into a virtual address.
Signed-off-by: Zhao Chenhui
Signed-off-by: Li Yang
---
drivers/usb/host/ehci-pci.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index a038b6c..e400aee
from overriding LDSCRIPT with a NAND-specific script,
unless such a script exists.
Signed-off-by: Zhao Chenhui
Acked-by: Scott Wood
---
arch/powerpc/config.mk |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/config.mk b/arch/powerpc/config.mk
index 2912604..08
On P2020DS and MPC8572DS, the link to SGMII card which use Vitesse
VSC8234 PHY can't come up. Current TBI PHY settings(TBICR_SETTINGS)
for SGMII mode cause link problems.
Revert commit 46e91674fb4b6d06c6a4984c0b5ac7d9a16923f4, and fix it.
Signed-off-by: Zhao Chenhui
---
drivers/net/t
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