://bugs.launchpad.net/linaro-stable-kernel/+bug/1301727
Can you suggest anything which we can try / test at our end to solve the
ethernet issue with uboot/linux
Best Regards,
On 12-Mar-2014, at 11:59 am, armdev wrote:
> Dear Inderpal,
>
> Thanks for helping us, we were able to test ethe
Dear tomaz
Waiting for your reply...
On 28-Mar-2014, at 3:12 pm, armdev wrote:
> Dear Tomasz,
>
> On 16-Mar-2014, at 6:23 pm, Tomasz Figa wrote:
>
>> Hi,
>>
>> On 14.03.2014 09:04, armdev wrote:
>>> Hi,
>>>
>>> We are trying to e
Dear Tomasz,
On 16-Mar-2014, at 6:23 pm, Tomasz Figa wrote:
> Hi,
>
> On 14.03.2014 09:04, armdev wrote:
>> Hi,
>>
>> We are trying to enable the UART3 on COM18 pins of arndale board. The UART3
>> RXD and TXD are on pins 2 and 4 which as per the base board
-rate generator uses SCLK_UART."
-Regards
Armdev Team
On 16-Mar-2014, at 3:55 pm, Michael Trimarchi
wrote:
> Hi
>
> On Sun, Mar 16, 2014 at 11:07 AM, armdev wrote:
>> Dear Michael,
>> Yep didn't got any prints. So tried a hack.
>> a) Booted using uart 2
&g
UART3, did the boot to UART3 worked for you ? So you see any
problem with any of our steps listed in this / pref mail.
Thanks
armdev team
On 16-Mar-2014, at 2:56 pm, Michael Trimarchi
wrote:
> Hi
>
> On Fri, Mar 14, 2014 at 9:04 AM, armdev wrote:
>> Hi,
>>
>>
Please can someone help
On 14-Mar-2014, at 1:34 pm, armdev wrote:
> Hi,
>
> We are trying to enable the UART3 on COM18 pins of arndale board. The UART3
> RXD and TXD are on pins 2 and 4 which as per the base board specification is
> connected as
>
> XuRXD3 : UART_3_RXD
is a register GPACON
(0x1140_)
Setting GPACON |= 0x0010_ should enable the pins, but I am not able to see
any output on UART3.
Can you please suggest what is the right procedure
-Regards
armdev team @FTM
___
U-Boot mailing list
U-Boot
tialized fine.
>
> I lost access to my board, so if you could debug this I would be grateful.
I have 3 boards of exynos family 5250 /5410 /5420. I will try on each and let
you know. If you have anything specific do let me know
> Thanks,
> Andre.
>
>>
>> Regards
>&g
arndale right ? Please confirm
Regards
Manish
armdev Team @FTM
On 13-Mar-2014, at 11:20 am, armdev wrote:
> Got a mail that Andre is not with linaro, Adding Christoffer Dall
>
> On 13-Mar-2014, at 11:17 am, armdev wrote:
>
>> Hi Andrey ,
>>
>> This is wrt your patc
Got a mail that Andre is not with linaro, Adding Christoffer Dall
On 13-Mar-2014, at 11:17 am, armdev wrote:
> Hi Andrey ,
>
> This is wrt your patch set which enabled the switch to non-sec and hip mode
> in armv7.
> We have a small piece of code which we run in hypmode
Hi Andrey ,
This is wrt your patch set which enabled the switch to non-sec and hip mode in
armv7.
We have a small piece of code which we run in hypmode using the bootm command
on arndale board
While this code was trying to access the GICD_ISENABLR0 (0x10481100), read was
always returning 0, wh
Dear Inderpal,
Thanks for helping us, we were able to test ethernet over usb.
It breaks often but it works with the return -1 patch.
The following error is observed most of the time
EHCI timed out on TD - token=0x8008d80
-Regards
armdev team
On 12-Mar-2014, at 9:48 am, Inderpal Singh wrote
Adding Inderpal singh and Trini. Please help
On 11-Mar-2014, at 12:27 pm, armdev wrote:
> Hi,
>
> We have recently started working on arndale and running u-boot head on it.
> Seems like it is crashing on our setup with a data abort on usb start. Can
> anyone please confirm an
fp :
r10: r9 : beb62ecc r8 : befbcc80
r7 : befbcc84 r6 : r5 : 00ff r4 : 0001
r3 : r2 : 0001 r1 : 00ff r0 :
Flags: nzCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
Thanks and Regards
Armdev@FTM Team
:
r10: r9 : beb62ecc r8 : befbcc80
r7 : befbcc84 r6 : r5 : 00ff r4 : 0001
r3 : r2 : 0001 r1 : 00ff r0 :
Flags: nzCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
Thanks and Regards
Armdev@FTM Team
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