From: Takahiro Kuwano <takahiro.kuw...@infineon.com>
The Infineon SEMPER NOR flash family uses 2-bit ECC by default with each
ECC block being 16 bytes. Under this scheme multi-pass programming to an
ECC block is not allowed. Set the writesize to make sure multi-pass
programming is not attempted on the flash.
Acked-by: Tudor Ambarus <tudor.amba...@linaro.org>
Signed-off-by: Takahiro Kuwano <takahiro.kuw...@infineon.com>
---
drivers/mtd/spi/spi-nor-core.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index a8f3edc9f69..23e71243927 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3520,6 +3520,13 @@ static void s25_late_init(struct spi_nor *nor,
struct spi_nor_flash_parameter *params)
{
nor->setup = s25_s28_setup;
+
+ /*
+ * Programming is supported only in 16-byte ECC data unit granularity.
+ * Byte-programming, bit-walking, or multiple program operations to the
+ * same ECC data unit without an erase are not allowed.
+ */
+ params->writesize = 16;
}
static int s25_s28_post_bfpt_fixup(struct spi_nor *nor,
@@ -3684,6 +3691,13 @@ static void s28hx_t_late_init(struct spi_nor *nor,
{
nor->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable;
nor->setup = s25_s28_setup;
+
+ /*
+ * Programming is supported only in 16-byte ECC data unit granularity.
+ * Byte-programming, bit-walking, or multiple program operations to the
+ * same ECC data unit without an erase are not allowed.
+ */
+ params->writesize = 16;
}
static void s28hx_t_post_sfdp_fixup(struct spi_nor *nor,
--
2.34.1
