On 6/7/21 7:53 PM, Adrian Fiergolski wrote:
> The default register configuration after powerup for PSSYSMON_ANALOG_BUS
> register is incorrect. Hence, fix this in SPL by writing correct fixed
> value. It follows UG1085 chapter 'PS SYSMON Analog_Bus' and reflects commit
> sw_apps:zynq ("056ca65d4
The default register configuration after powerup for PSSYSMON_ANALOG_BUS
register is incorrect. Hence, fix this in SPL by writing correct fixed
value. It follows UG1085 chapter 'PS SYSMON Analog_Bus' and reflects commit
sw_apps:zynq ("056ca65d44549ce27f716d423e8dfdefeee7440c")
in Xilinx:embeddedsw[
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