On Mon, Mar 07, 2022 at 02:55:51PM +0530, Vignesh Raghavendra wrote:
> MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
> incorrect.
>
> Without this delays in R5 SPL are 10x off.
>
> Signed-off-by: Vignesh Raghavendra
Applied to u-boot/master, thanks!
--
Tom
signat
On Sat, Apr 09, 2022 at 09:46:58PM +0530, Vignesh Raghavendra wrote:
>
>
> On 07/03/22 2:55 pm, Vignesh Raghavendra wrote:
> > MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
> > incorrect.
> >
> > Without this delays in R5 SPL are 10x off.
> >
> > Signed-off-by: Vignes
On 07/03/22 2:55 pm, Vignesh Raghavendra wrote:
> MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
> incorrect.
>
> Without this delays in R5 SPL are 10x off.
>
> Signed-off-by: Vignesh Raghavendra
> ---
> arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi | 2 +-
>
MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
incorrect.
Without this delays in R5 SPL are 10x off.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm
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