[PATCH] ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing

> Adjust the DRAM timing settings for this board per ones provided > by hardware department. The change is applied to the LPDDR4 MR11 > register CA ODT configuration, from RZQ/6 to RZQ/3, which fixes > stability issues on subset of boards. The DDR PHY PIE block has > been updated accordingly. > Sig

Re: [PATCH] ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing

On 8/30/22 18:01, Tim Harvey wrote: Hi, Marek, Might I ask how you ran into the issue There were a couple of boards which were unstable and kept crashing at runtime, often when using GPU. Either the machine locked up completely or there were rendering artifacts. Eventually also memtester t

Re: [PATCH] ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing

On Tue, Aug 30, 2022 at 5:34 AM Marek Vasut wrote: > > Adjust the DRAM timing settings for this board per ones provided > by hardware department. The change is applied to the LPDDR4 MR11 > register CA ODT configuration, from RZQ/6 to RZQ/3, which fixes > stability issues on subset of boards. The D

Re: [PATCH] ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing

On Tue, Aug 30, 2022 at 9:34 AM Marek Vasut wrote: > > Adjust the DRAM timing settings for this board per ones provided > by hardware department. The change is applied to the LPDDR4 MR11 > register CA ODT configuration, from RZQ/6 to RZQ/3, which fixes > stability issues on subset of boards. The D

[PATCH] ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing

Adjust the DRAM timing settings for this board per ones provided by hardware department. The change is applied to the LPDDR4 MR11 register CA ODT configuration, from RZQ/6 to RZQ/3, which fixes stability issues on subset of boards. The DDR PHY PIE block has been updated accordingly. Signed-off-by: