[PATCH] arm: dts: armada8040: Fix CP0 eMMC/SDIO support

2021-09-27 Thread Robert Marko
During the migration to a single DTSI for the CP110-s specific pinctrl compatibles were moved to the SoC DTSI as CP0 and CP1 have some specifics. Namely, CP0 eMMC/SDIO support depends on the mvebu-pinctrl driver setting the BIT(0) in eMMC PHY IO Control 0 Register to 0 in order for the connect the

Re: [PATCH] arm: dts: armada8040: Fix CP0 eMMC/SDIO support

2021-09-28 Thread Stefan Roese
On 27.09.21 23:03, Robert Marko wrote: During the migration to a single DTSI for the CP110-s specific pinctrl compatibles were moved to the SoC DTSI as CP0 and CP1 have some specifics. Namely, CP0 eMMC/SDIO support depends on the mvebu-pinctrl driver setting the BIT(0) in eMMC PHY IO Control 0 Re

Re: [PATCH] arm: dts: armada8040: Fix CP0 eMMC/SDIO support

2021-09-29 Thread Stefan Roese
On 27.09.21 23:03, Robert Marko wrote: During the migration to a single DTSI for the CP110-s specific pinctrl compatibles were moved to the SoC DTSI as CP0 and CP1 have some specifics. Namely, CP0 eMMC/SDIO support depends on the mvebu-pinctrl driver setting the BIT(0) in eMMC PHY IO Control 0 Re