Re: [PATCH] arm: mvebu: Add support for reading LD0 and LD1 eFuse

2022-04-21 Thread Stefan Roese
On 4/6/22 14:18, Pali Rohár wrote: Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse is used for secure boot and each line is 64 bits long + 1 lock bit. LD eFuse lines are 256 bits long + 1 lock bit. LD 0 line is reserved for Marvell Internal Use and LD 1 line is for Gene

Re: [PATCH] arm: mvebu: Add support for reading LD0 and LD1 eFuse

2022-04-07 Thread Marek Behún
On Thu, 7 Apr 2022 13:53:23 +0200 Pali Rohár wrote: > On Wednesday 06 April 2022 21:21:59 Marek Behún wrote: > > On Wed, 6 Apr 2022 14:18:18 +0200 > > Pali Rohár wrote: > > > > > Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse > > > is used for secure boot and each

Re: [PATCH] arm: mvebu: Add support for reading LD0 and LD1 eFuse

2022-04-07 Thread Pali Rohár
On Wednesday 06 April 2022 21:21:59 Marek Behún wrote: > On Wed, 6 Apr 2022 14:18:18 +0200 > Pali Rohár wrote: > > > Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse > > is used for secure boot and each line is 64 bits long + 1 lock bit. LD > > eFuse lines are 256 bits

Re: [PATCH] arm: mvebu: Add support for reading LD0 and LD1 eFuse

2022-04-06 Thread Marek Behún
On Wed, 6 Apr 2022 14:18:18 +0200 Pali Rohár wrote: > Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse > is used for secure boot and each line is 64 bits long + 1 lock bit. LD > eFuse lines are 256 bits long + 1 lock bit. LD 0 line is reserved for > Marvell Internal Use

[PATCH] arm: mvebu: Add support for reading LD0 and LD1 eFuse

2022-04-06 Thread Pali Rohár
Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse is used for secure boot and each line is 64 bits long + 1 lock bit. LD eFuse lines are 256 bits long + 1 lock bit. LD 0 line is reserved for Marvell Internal Use and LD 1 line is for General Purpose Data. U-Boot already cont