Re: [PATCH] pci: layerscape: Change to allocate zeroed memery for struct ls_pcie

2021-03-16 Thread Vladimir Oltean
On Thu, Mar 11, 2021 at 03:30:51PM +0800, Zhiqiang Hou wrote: > From: Hou Zhiqiang > > As on some incipient Layerscape platforms (LS1043A series) there isn't > separate PF control register block, these registers reside in the LUT > register block, so when the driver detected there isn't 'ctrl', i

[PATCH] pci: layerscape: Change to allocate zeroed memery for struct ls_pcie

2021-03-10 Thread Zhiqiang Hou
From: Hou Zhiqiang As on some incipient Layerscape platforms (LS1043A series) there isn't separate PF control register block, these registers reside in the LUT register block, so when the driver detected there isn't 'ctrl', it will assign the 'lut' address to the ls_pcie->ctrl. The current code