On 11/29/21 16:12, Sean Anderson wrote:
On 11/24/21 9:52 AM, Michal Simek wrote:
On 11/22/21 22:53, Sean Anderson wrote:
On 11/18/21 7:30 AM, Michal Simek wrote:
Add PSGTR driver for Xilinx ZynqMP.
The most of configurations are taken from Linux kernel psgtr driver.
USB3.0 and SGMII
On 11/24/21 9:52 AM, Michal Simek wrote:
On 11/22/21 22:53, Sean Anderson wrote:
On 11/18/21 7:30 AM, Michal Simek wrote:
Add PSGTR driver for Xilinx ZynqMP.
The most of configurations are taken from Linux kernel psgtr driver.
USB3.0 and SGMII configurations are tested on SOM. In SGMII
On 11/22/21 22:53, Sean Anderson wrote:
On 11/18/21 7:30 AM, Michal Simek wrote:
Add PSGTR driver for Xilinx ZynqMP.
The most of configurations are taken from Linux kernel psgtr driver.
USB3.0 and SGMII configurations are tested on SOM. In SGMII case also
IOU_SLCR reg is updated to get
On 11/18/21 7:30 AM, Michal Simek wrote:
Add PSGTR driver for Xilinx ZynqMP.
The most of configurations are taken from Linux kernel psgtr driver.
USB3.0 and SGMII configurations are tested on SOM. In SGMII case also
IOU_SLCR reg is updated to get proper clock setup and signal detection
Add PSGTR driver for Xilinx ZynqMP.
The most of configurations are taken from Linux kernel psgtr driver.
USB3.0 and SGMII configurations are tested on SOM. In SGMII case also
IOU_SLCR reg is updated to get proper clock setup and signal detection
configuration.
Signed-off-by: Michal Simek
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