Hi Adrian,
On Wed, Sep 11, 2024 at 9:23 AM John Paul Adrian Glaubitz
wrote:
> Odd, I haven't received the original mail.
>
> @Marek: Could you resent your patch CC'ing the current maintainers of arch/sh?
It is a patch for U-Boot, not for the kernel.
Full thread at
https://lore.kernel.org/2c133f
Good morning Geert,
On Wed, 2024-09-11 at 09:19 +0200, Geert Uytterhoeven wrote:
> Hi Marek,
>
> On Tue, Sep 10, 2024 at 7:55 PM Marek Vasut wrote:
> > On 9/10/24 7:21 PM, Tom Rini wrote:
> > > On Tue, Sep 10, 2024 at 02:15:58AM +0200, Marek Vasut wrote:
> > >
> > > > Implement invalidate_icach
Hi Marek,
On Tue, Sep 10, 2024 at 7:55 PM Marek Vasut wrote:
> On 9/10/24 7:21 PM, Tom Rini wrote:
> > On Tue, Sep 10, 2024 at 02:15:58AM +0200, Marek Vasut wrote:
> >
> >> Implement invalidate_icache_all() by clearing all V bits in
> >> IC and OC. This is done by setting CCR cache control regist
On 9/10/24 7:21 PM, Tom Rini wrote:
On Tue, Sep 10, 2024 at 02:15:58AM +0200, Marek Vasut wrote:
Implement invalidate_icache_all() by clearing all V bits in
IC and OC. This is done by setting CCR cache control register
ICI and OCI bits.
Signed-off-by: Marek Vasut
---
Cc: Ilias Apalodimas
Cc:
On Tue, Sep 10, 2024 at 02:15:58AM +0200, Marek Vasut wrote:
> Implement invalidate_icache_all() by clearing all V bits in
> IC and OC. This is done by setting CCR cache control register
> ICI and OCI bits.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Ilias Apalodimas
> Cc: Nobuhiro Iwamatsu
> C
Implement invalidate_icache_all() by clearing all V bits in
IC and OC. This is done by setting CCR cache control register
ICI and OCI bits.
Signed-off-by: Marek Vasut
---
Cc: Ilias Apalodimas
Cc: Nobuhiro Iwamatsu
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
arch/sh/cpu/sh4/cache.c | 11 +++-
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