Andre,
On 7/27/21 7:12 AM, Andre Przywara wrote:
> On Sun, 18 Apr 2021 22:21:41 -0500
> Samuel Holland wrote:
>
> Hi,
>
>> Most sun6i-derived SoCs contain SRAM A2, a secure SRAM area for ARISC
>> SCP firmware. H3 has a smaller SRAM than other SoCs (A31/A33/A23/A83T).
>>
>> On sun8i SoCs which d
On Sun, 18 Apr 2021 22:21:41 -0500
Samuel Holland wrote:
Hi,
> Most sun6i-derived SoCs contain SRAM A2, a secure SRAM area for ARISC
> SCP firmware. H3 has a smaller SRAM than other SoCs (A31/A33/A23/A83T).
>
> On sun8i SoCs which do not have SRAM B, we can use part of this SRAM for
> the secur
On Sun, 18 Apr 2021 22:21:41 -0500
Samuel Holland wrote:
Hi Samuel,
> Most sun6i-derived SoCs contain SRAM A2, a secure SRAM area for ARISC
> SCP firmware. H3 has a smaller SRAM than other SoCs (A31/A33/A23/A83T).
>
> On sun8i SoCs which do not have SRAM B, we can use part of this SRAM for
> th
Most sun6i-derived SoCs contain SRAM A2, a secure SRAM area for ARISC
SCP firmware. H3 has a smaller SRAM than other SoCs (A31/A33/A23/A83T).
On sun8i SoCs which do not have SRAM B, we can use part of this SRAM for
the secure monitor. Follow the design of 64-bit SoCs and use the first
part for the
4 matches
Mail list logo