On 12/12/23 13:34, Tom Rini wrote:
On Wed, Dec 06, 2023 at 06:58:14PM +0530, Jagan Teki wrote:
On Wed, Dec 6, 2023 at 6:11 PM Michal Simek wrote:
On 12/6/23 13:24, Jagan Teki wrote:
On Fri, Aug 18, 2023 at 9:51 AM Ashok Reddy Soma
wrote:
This series adds support for Xilinx qspi
On Wed, Dec 06, 2023 at 06:58:14PM +0530, Jagan Teki wrote:
> On Wed, Dec 6, 2023 at 6:11 PM Michal Simek wrote:
> >
> >
> >
> > On 12/6/23 13:24, Jagan Teki wrote:
> > > On Fri, Aug 18, 2023 at 9:51 AM Ashok Reddy Soma
> > > wrote:
> > >>
> > >> This series adds support for Xilinx qspi parallel
On Wed, Dec 6, 2023 at 7:12 PM Michal Simek wrote:
>
>
>
> On 12/6/23 14:28, Jagan Teki wrote:
> > On Wed, Dec 6, 2023 at 6:11 PM Michal Simek wrote:
> >>
> >>
> >>
> >> On 12/6/23 13:24, Jagan Teki wrote:
> >>> On Fri, Aug 18, 2023 at 9:51 AM Ashok Reddy Soma
> >>> wrote:
>
> This
On 12/6/23 14:28, Jagan Teki wrote:
On Wed, Dec 6, 2023 at 6:11 PM Michal Simek wrote:
On 12/6/23 13:24, Jagan Teki wrote:
On Fri, Aug 18, 2023 at 9:51 AM Ashok Reddy Soma
wrote:
This series adds support for Xilinx qspi parallel and stacked memeories.
In parallel mode, the current
On Wed, Dec 6, 2023 at 6:11 PM Michal Simek wrote:
>
>
>
> On 12/6/23 13:24, Jagan Teki wrote:
> > On Fri, Aug 18, 2023 at 9:51 AM Ashok Reddy Soma
> > wrote:
> >>
> >> This series adds support for Xilinx qspi parallel and stacked memeories.
> >>
> >> In parallel mode, the current implementation
On 12/6/23 13:24, Jagan Teki wrote:
On Fri, Aug 18, 2023 at 9:51 AM Ashok Reddy Soma
wrote:
This series adds support for Xilinx qspi parallel and stacked memeories.
In parallel mode, the current implementation assumes that a maximum of
two flashes are connected. The QSPI controller splits
On Fri, Aug 18, 2023 at 9:51 AM Ashok Reddy Soma
wrote:
>
> This series adds support for Xilinx qspi parallel and stacked memeories.
>
> In parallel mode, the current implementation assumes that a maximum of
> two flashes are connected. The QSPI controller splits the data evenly
> between both
On 8/18/23 06:21, Ashok Reddy Soma wrote:
This series adds support for Xilinx qspi parallel and stacked memeories.
In parallel mode, the current implementation assumes that a maximum of
two flashes are connected. The QSPI controller splits the data evenly
between both the flashes so, both
This series adds support for Xilinx qspi parallel and stacked memeories.
In parallel mode, the current implementation assumes that a maximum of
two flashes are connected. The QSPI controller splits the data evenly
between both the flashes so, both the flashes that are connected in
parallel mode
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