On Wed, Dec 27, 2023 at 11:49 AM Simon Glass wrote:
>
> Hi Sam,
>
[snip]
>
> Just a few nits here
>
> Reviewed-by: Simon Glass
>
[snip]
> > +
> > +struct exynos_usi {
> > + struct udevice *dev;
>
> Can we drop this? It doesn't seem very useful and we try to avoid
> having bidirectional
On Wed, Dec 27, 2023 at 3:11 AM Minkyu Kang wrote:
>
> Hi
>
>
> 2023년 12월 13일 (수) 12:42, Sam Protsenko 님이 작성:
>>
[snip]
>> +
>> +/**
>> + * exynos_usi_set_sw_conf - Set USI block configuration mode
>> + * @usi: USI driver object
>> + * @mode: Mode index
>> + *
>> + * Select underlying serial pro
Hi Sam,
On Wed, Dec 13, 2023 at 3:16 AM Sam Protsenko
wrote:
>
> USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
> provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
> registers usually reside in the same register map as a particular
> underlying protocol
Hi
2023년 12월 13일 (수) 12:42, Sam Protsenko 님이 작성:
> USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
> provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
> registers usually reside in the same register map as a particular
> underlying protocol it implements
> -Original Message-
> From: U-Boot On Behalf Of Sam Protsenko
> Sent: Wednesday, December 13, 2023 12:17 PM
> To: Minkyu Kang ; Tom Rini ;
> Lukasz Majewski ; Sean Anderson
> Cc: Simon Glass ; Heinrich Schuchardt
> ; u-boot@lists.denx.de
> Subject: [PATCH 04/13]
USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
registers usually reside in the same register map as a particular
underlying protocol it implements, but have some particular offset. E.g.
on Exynos850 the USI
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