By providing entries in the binman node of the device tree, binman will be able to find and package board config artifacts generated by TIBoardConfig with sysfw.bin and generate the final image sysfw.itb. It will also pick out the R5 SPL and sign it with the help of TI signing entry and generate the final tiboot3.bin.
Entries for A72 build have been added to k3-j721e-binman.dtsi to
generate tispl.bin and u-boot.img.
Support has been added for both HS(SR 1.1) and GP images where the
encrypted system firmware binary must be signed along with the signed
certificate binary.
tiboot3.bin and sysfw-j721e_sr1_1-hs.itb: For HS devices
tiboot3.bin_unsigned and sysfw-j721e-gp-evm.itb: For GP devices
<filename>.bin/img: For HS devices
<filename>.bin_unsigned/img_unsigned: For GP devices
Intention of patch is to move signing and packaging to binman,
thus making makefile target only if binman is not enabled.
It is to be noted that the bootflow followed by J721E requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
sysfw.itb:
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OPTEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-fran...@ti.com>
---
arch/arm/dts/k3-j721e-binman.dtsi | 605 ++++++++++++++++++
.../k3-j721e-common-proc-board-u-boot.dtsi | 1 +
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 1 +
arch/arm/mach-k3/config.mk | 4 +
board/ti/j721e/Kconfig | 2 +
scripts/Makefile.spl | 2 +
6 files changed, 615 insertions(+)
create mode 100644 arch/arm/dts/k3-j721e-binman.dtsi
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi
b/arch/arm/dts/k3-j721e-binman.dtsi
new file mode 100644
index 0000000000..ea97adafa5
--- /dev/null
+++ b/arch/arm/dts/k3-j721e-binman.dtsi
@@ -0,0 +1,605 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_J721E_R5_EVM
+
+&binman {
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure {
+ filename = "spl/u-boot-spl.bin";
+ core = <16>;
+ load = <CONFIG_SPL_TEXT_BASE>;
+ key = "/keys/custMpk.pem";
+ };
+ };
+ ti-fs-cert.bin {
+ filename = "ti-fs-cert.bin";
+ ti-fs-firmware-j721e_sr1_1-hs-cert.bin {
+ filename = "ti-fs-firmware-j721e_sr1_1-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ sysfw {
+ filename = "sysfw.bin";
+ ti-secure {
+ filename = "ti-fs-cert.bin";
+ core = <0>;
+ load = <0x40000>;
+ key = "/keys/custMpk.pem";
+ sysfw-cert;
+ };
+ ti-fs-firmware-j721e_sr1_1-hs-enc.bin {
+ filename = "ti-fs-firmware-j721e_sr1_1-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ itb {
+ filename = "sysfw-j721e_sr1_1-hs.itb";
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "board-cfg.bin";
+ secure;
+ };
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "pm-cfg.bin";
+ secure;
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "rm-cfg.bin";
+ secure;
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = "sec-cfg.bin";
+ secure;
+ };
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure {
+ filename = "spl/u-boot-spl.bin";
+ core = <16>;
+ load = <CONFIG_SPL_TEXT_BASE>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ };
+ };
+ ti-fs.bin {
+ filename = "ti-fs.bin";
+ ti-fs-firmware-j721e-gp.bin {
+ filename = "ti-fs-firmware-j721e-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ sysfw_gp {
+ filename = "sysfw.bin_gp";
+ ti-secure {
+ filename = "ti-fs.bin";
+ core = <0>;
+ load = <0x40000>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ };
+ };
+ itb_gp {
+ filename = "sysfw-j721e-gp-evm.itb";
+ symlink = "sysfw.itb";
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin_gp";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "board-cfg.bin";
+ };
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "pm-cfg.bin";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "rm-cfg.bin";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sec-cfg.bin";
+ };
+ };
+ };
+ };
+ };
+};
+#endif
+
+#ifdef CONFIG_TARGET_J721E_A72_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_J721E_EVM_DTB "spl/dts/k3-j721e-common-proc-board.dtb"
+#define SPL_J721E_TPS_DTB "spl/dts/k3-j721e-tps65917-proc-board.dtb"
+#define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define J721E_EVM_DTB "arch/arm/dts/k3-j721e-common-proc-board.dtb"
+#define J721E_TPS_DTB "arch/arm/dts/k3-j721e-tps65917-proc-board.dtb"
+#define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ filename = SPL_NODTB;
+ secure;
+ };
+ };
+
+ fdt-0 {
+ description =
"k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_J721E_EVM_DTB;
+ secure;
+ };
+ };
+
+ fdt-1 {
+ description =
"k3-j721e-tps65917-proc-board";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_J721E_TPS_DTB;
+ secure;
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = SPL_J721E_SK_DTB;
+ secure;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description =
"k3-j721e-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+
+ conf-1 {
+ description =
"k3-j721e-tps65917-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for j721e board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ filename = UBOOT_NODTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description =
"k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = J721E_EVM_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description =
"k3-j721e-tps65917-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = J721E_TPS_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ filename = J721E_SK_DTB;
+ secure;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description =
"k3-j721e-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ conf-1 {
+ description =
"k3-j721e-tps65917-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename =
"spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-1 {
+ description =
"k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_J721E_EVM_DTB;
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_J721E_SK_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description =
"k3-j721e-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for j721e board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description =
"k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = J721E_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = J721E_SK_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description =
"k3-j721e-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index b2b81f804d..ccd5ac3696 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/net/ti-dp83867.h>
+#include "k3-j721e-binman.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index ab9d6e65d8..999a74bf9d 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -8,6 +8,7 @@
#include "k3-j721e-som-p0.dtsi"
#include "k3-j721e-ddr-evm-lp4-4266.dtsi"
#include "k3-j721e-ddr.dtsi"
+#include "k3-j721e-binman.dtsi"
#include <dt-bindings/phy/phy-cadence.h>
/ {
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index 138b44a3fa..a47e5e7e90 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -72,6 +72,7 @@ endif
# tiboot3.bin is mandated by ROM and ROM only supports R5 boot.
# So restrict tiboot3.bin creation for CPU_V7R.
+ifndef CONFIG_BINMAN
ifdef CONFIG_CPU_V7R
image_check: $(obj)/u-boot-spl.bin FORCE
@if [ $(IMAGE_SIZE) -gt $(MAX_SIZE) ]; then \
@@ -88,6 +89,7 @@ tiboot3.bin: image_check FORCE
INPUTS-y += tiboot3.bin
endif
+endif
ifdef CONFIG_ARM64
@@ -95,6 +97,7 @@ ifeq ($(CONFIG_SOC_K3_J721E),)
export DM := /dev/null
endif
+ifndef CONFIG_BINMAN
ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
SPL_ITS := u-boot-spl-k3_HS.its
$(SPL_ITS): export IS_HS=1
@@ -103,6 +106,7 @@ else
SPL_ITS := u-boot-spl-k3.its
INPUTS-y += tispl.bin
endif
+endif
ifeq ($(CONFIG_SPL_OF_LIST),)
LIST_OF_DTB := $(CONFIG_DEFAULT_DEVICE_TREE)
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index d19d30d59e..03fc2e0b55 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -14,6 +14,7 @@ config TARGET_J721E_A72_EVM
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
config TARGET_J721E_R5_EVM
bool "TI K3 based J721E EVM running on R5"
@@ -24,6 +25,7 @@ config TARGET_J721E_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 15ac87286d..a7811609bf 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -593,6 +593,8 @@ $(obj)/$(SPL_BIN).multidtb.fit.lzo:
$(obj)/$(SPL_BIN).multidtb.fit
@lzop -f9 $< > $@
ifdef CONFIG_ARCH_K3
+ifndef CONFIG_BINMAN
tispl.bin: $(obj)/u-boot-spl-nodtb.bin $(SHRUNK_ARCH_DTB) $(SPL_ITS) FORCE
$(call if_changed,mkfitimage)
endif
+endif
--
2.34.1
