[PATCH 1/2] mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output

2021-04-09 Thread sbabic
> From: Haibo Chen > For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these > are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the > card clock output. > After commit b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support"), > we meet SD3.0 card can't

RE: [PATCH 1/2] mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output

2021-03-03 Thread ZHIZHIKIN Andrey
il.com; ye...@nxp.com > Subject: [PATCH 1/2] mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to > control card clock output > > From: Haibo Chen > > For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, > these are reserved bits. Instead, use VENDORSPEC_FR

[PATCH 1/2] mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output

2021-03-03 Thread haibo . chen
From: Haibo Chen For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the card clock output. After commit b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support"), we meet SD3.0 card can't work at U