The current code assumes hsync and vsync are active high by default, but
they are actually active low by default. This results in panels being
driven with the wrong sync polarities. Invert the check to fix it.
Signed-off-by: John Watts <cont...@jookia.org>
---
drivers/video/sunxi/lcdc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/sunxi/lcdc.c b/drivers/video/sunxi/lcdc.c
index 73033c3b85..4fcea6050a 100644
--- a/drivers/video/sunxi/lcdc.c
+++ b/drivers/video/sunxi/lcdc.c
@@ -133,9 +133,9 @@ void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
}
val = SUNXI_LCDC_TCON0_IO_POL_DCLK_PHASE(dclk_phase);
- if (mode->flags & DISPLAY_FLAGS_HSYNC_LOW)
+ if (mode->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= SUNXI_LCDC_TCON_HSYNC_MASK;
- if (mode->flags & DISPLAY_FLAGS_VSYNC_LOW)
+ if (mode->flags & DISPLAY_FLAGS_VSYNC_HIGH)
val |= SUNXI_LCDC_TCON_VSYNC_MASK;
#ifdef CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
--
2.45.2
