Re: [PATCH 1/4] mtd: spi-nor-core: Do not start or end writes at odd address in DTR mode

Manorit Chawdhry writes: > From: Pratyush Yadav > > On DTR capable flashes like Micron Xcella the writes cannot start or end > at an odd address in DTR mode. Extra 0xff bytes need to be prepended or > appended respectively to make sure both the start and end addresses are > even. > > Signed-off-

[PATCH 1/4] mtd: spi-nor-core: Do not start or end writes at odd address in DTR mode

From: Pratyush Yadav On DTR capable flashes like Micron Xcella the writes cannot start or end at an odd address in DTR mode. Extra 0xff bytes need to be prepended or appended respectively to make sure both the start and end addresses are even. Signed-off-by: Pratyush Yadav Reviewed-by: Vignesh