On Sat, Oct 07, 2023 at 11:14:06PM +0200, Marek Vasut wrote:
> On 10/5/23 14:08, Paul Barker wrote:
> > The case we're interested in here is the Receive Error (ER) & Break
> > Detect (BRK) conditions. I've done some further datasheet digging...
> >
> > RZ/G2L datasheet says these are cleared by wr
On 10/5/23 14:08, Paul Barker wrote:
On 04/10/2023 20:41, Marek Vasut wrote:
On 10/4/23 18:38, Paul Barker wrote:
On Wed, Oct 04, 2023 at 05:17:55PM +0200, Marek Vasut wrote:
On 10/4/23 15:43, Paul Barker wrote:
On Wed, Oct 04, 2023 at 02:26:49PM +0200, Marek Vasut wrote:
On 10/4/23 10:48, P
On 10/5/23 18:18, Paul Barker wrote:
On 04/10/2023 13:26, Marek Vasut wrote:
On 10/4/23 10:48, Paul Barker wrote:
On 03/10/2023 14:23, Marek Vasut wrote:
On 9/20/23 14:42, Paul Barker wrote:
+ if (IS_ENABLED(CONFIG_RZG2L)) {
+ struct reset_ctl rst;
+ int ret;
On 04/10/2023 13:26, Marek Vasut wrote:
> On 10/4/23 10:48, Paul Barker wrote:
>> On 03/10/2023 14:23, Marek Vasut wrote:
>>> On 9/20/23 14:42, Paul Barker wrote:
+ if (IS_ENABLED(CONFIG_RZG2L)) {
+ struct reset_ctl rst;
+ int ret;
+
+ ret = rese
On 04/10/2023 20:41, Marek Vasut wrote:
> On 10/4/23 18:38, Paul Barker wrote:
>> On Wed, Oct 04, 2023 at 05:17:55PM +0200, Marek Vasut wrote:
>>> On 10/4/23 15:43, Paul Barker wrote:
On Wed, Oct 04, 2023 at 02:26:49PM +0200, Marek Vasut wrote:
> On 10/4/23 10:48, Paul Barker wrote:
>>
On 10/4/23 18:38, Paul Barker wrote:
On Wed, Oct 04, 2023 at 05:17:55PM +0200, Marek Vasut wrote:
On 10/4/23 15:43, Paul Barker wrote:
On Wed, Oct 04, 2023 at 02:26:49PM +0200, Marek Vasut wrote:
On 10/4/23 10:48, Paul Barker wrote:
On 03/10/2023 14:23, Marek Vasut wrote:
On 9/20/23 14:42, P
On Wed, Oct 04, 2023 at 05:17:55PM +0200, Marek Vasut wrote:
> On 10/4/23 15:43, Paul Barker wrote:
> > On Wed, Oct 04, 2023 at 02:26:49PM +0200, Marek Vasut wrote:
> > > On 10/4/23 10:48, Paul Barker wrote:
> > > > On 03/10/2023 14:23, Marek Vasut wrote:
> > > > > On 9/20/23 14:42, Paul Barker wro
On 10/4/23 15:43, Paul Barker wrote:
On Wed, Oct 04, 2023 at 02:26:49PM +0200, Marek Vasut wrote:
On 10/4/23 10:48, Paul Barker wrote:
On 03/10/2023 14:23, Marek Vasut wrote:
On 9/20/23 14:42, Paul Barker wrote:
Extend the existing driver to support the SCIF serial ports on the
Renesas RZ/G2L
On Wed, Oct 04, 2023 at 02:26:49PM +0200, Marek Vasut wrote:
> On 10/4/23 10:48, Paul Barker wrote:
> > On 03/10/2023 14:23, Marek Vasut wrote:
> > > On 9/20/23 14:42, Paul Barker wrote:
> > > > Extend the existing driver to support the SCIF serial ports on the
> > > > Renesas RZ/G2L (R9A07G044) So
On 10/4/23 10:48, Paul Barker wrote:
On 03/10/2023 14:23, Marek Vasut wrote:
On 9/20/23 14:42, Paul Barker wrote:
Extend the existing driver to support the SCIF serial ports on the
Renesas RZ/G2L (R9A07G044) SoC. This also requires us to ensure that the
relevant reset signal is de-asserted befo
On 03/10/2023 14:23, Marek Vasut wrote:
> On 9/20/23 14:42, Paul Barker wrote:
>> Extend the existing driver to support the SCIF serial ports on the
>> Renesas RZ/G2L (R9A07G044) SoC. This also requires us to ensure that the
>> relevant reset signal is de-asserted before we try to talk to the SCIF
On 9/20/23 14:42, Paul Barker wrote:
Extend the existing driver to support the SCIF serial ports on the
Renesas RZ/G2L (R9A07G044) SoC. This also requires us to ensure that the
relevant reset signal is de-asserted before we try to talk to the SCIF
module.
Signed-off-by: Paul Barker
Reviewed-by:
Extend the existing driver to support the SCIF serial ports on the
Renesas RZ/G2L (R9A07G044) SoC. This also requires us to ensure that the
relevant reset signal is de-asserted before we try to talk to the SCIF
module.
Signed-off-by: Paul Barker
Reviewed-by: Biju Das
Reviewed-by: Lad Prabhakar
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