On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
>
> Before relocating to SDRAM, the ECC is initialized by clearing the
> whole SDRAM. In order to speed this up, dcache_enable is used (see
> sdram_init_ecc_bits).
>
> Since commit 503eea451903 ("arm: cp15: update DACR value to activate
> access co
Before relocating to SDRAM, the ECC is initialized by clearing the
whole SDRAM. In order to speed this up, dcache_enable is used (see
sdram_init_ecc_bits).
Since commit 503eea451903 ("arm: cp15: update DACR value to activate
access control"), this no longer works, because running code in OCRAM
wit
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