Perform a simple rename of CONFIG_SLIC to CFG_SLIC

Signed-off-by: Tom Rini <tr...@konsulko.com>
---
 board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +-
 include/configs/p1_p2_rdb_pc.h              | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c 
b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index df9f6ae47322..4d7d042eaf3b 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -187,7 +187,7 @@ void board_gpio_init(void)
        setbits_be32(&pgpio->gpdat, 0x00080000);
 #endif
 
-#ifdef CONFIG_SLIC
+#ifdef CFG_SLIC
        /* reset SLIC */
        setbits_be32(&pgpio->gpdir, 0x00040000);
        setbits_be32(&pgpio->gpdat, 0x00040000);
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 832ad9c3ece0..be7680198299 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -13,7 +13,7 @@
 #include <linux/stringify.h>
 
 #if defined(CONFIG_TARGET_P1020RDB_PC)
-#define CONFIG_SLIC
+#define CFG_SLIC
 #define __SW_BOOT_MASK         0x03
 #define __SW_BOOT_NOR          0x5c
 #define __SW_BOOT_SPI          0x1c
@@ -42,7 +42,7 @@
  * 011101 800 800 400 667 PCIe-2 Core0 boot; Core1 hold-off
  */
 #if defined(CONFIG_TARGET_P1020RDB_PD)
-#define CONFIG_SLIC
+#define CFG_SLIC
 #define __SW_BOOT_MASK         0x03
 #define __SW_BOOT_NOR          0x64
 #define __SW_BOOT_SPI          0x34
-- 
2.25.1

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