There are a large number of options under CONFIG_SYS (but some of these
are elsewhere, spotted while cleaning CONFIG_SYS) that are never
referenced, or only used slightly later in the config file. Remove or
restructure these.
Signed-off-by: Tom Rini <tr...@konsulko.com>
---
doc/arch/m68k.rst | 2 --
include/configs/M5253DEMO.h | 3 ---
include/configs/M5275EVB.h | 5 -----
include/configs/P2041RDB.h | 7 -------
include/configs/am3517_evm.h | 2 --
include/configs/astro_mcf5373l.h | 4 ----
include/configs/brppt1.h | 4 ----
include/configs/chiliboard.h | 6 ------
include/configs/cm_t335.h | 2 --
include/configs/cobra5272.h | 7 -------
include/configs/corenet_ds.h | 6 ------
include/configs/da850evm.h | 1 -
include/configs/etamin.h | 1 -
include/configs/ids8313.h | 7 -------
include/configs/km/km-powerpc.h | 3 ---
include/configs/km/km_arm.h | 3 ---
include/configs/ls1012aqds.h | 22 ----------------------
include/configs/ls2080aqds.h | 4 ----
include/configs/ls2080ardb.h | 4 ----
include/configs/mx6sabreauto.h | 1 -
include/configs/omap3_beagle.h | 1 -
include/configs/omap3_evm.h | 1 -
include/configs/omap3_logic.h | 2 --
include/configs/qemu-ppce500.h | 2 --
include/configs/s5p4418_nanopi2.h | 3 +--
include/configs/siemens-am33x-common.h | 3 ---
include/configs/vexpress_common.h | 6 +-----
include/configs/xtfpga.h | 24 ++++--------------------
28 files changed, 6 insertions(+), 130 deletions(-)
diff --git a/doc/arch/m68k.rst b/doc/arch/m68k.rst
index 698e288c4487..87a51e5b7db9 100644
--- a/doc/arch/m68k.rst
+++ b/doc/arch/m68k.rst
@@ -114,8 +114,6 @@ apply to one or more cpu for the ColdFire family:
CONFIG_SYS_MBAR:
defines the base address of the MCF5272 configuration registers
-CONFIG_SYS_ENET_BD_BASE:
- defines the base address of the FEC buffer descriptors
CONFIG_SYS_SCR:
defines the contents of the System Configuration Register
CONFIG_SYS_SPR:
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 9f648342ea33..75278f4dab71 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -125,9 +125,6 @@
#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \
CF_CACR_DBWE)
-/* Port configuration */
-#define CONFIG_SYS_FECI2C 0xF0
-
#define CONFIG_SYS_CS0_BASE 0xFF800000
#define CONFIG_SYS_CS0_MASK 0x007F0021
#define CONFIG_SYS_CS0_CTRL 0x00001D80
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 1fd51212d637..35ff267371c2 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -122,9 +122,4 @@
#define CONFIG_SYS_CS1_CTRL 0x00001900
#define CONFIG_SYS_CS1_MASK 0x00070001
-/*-----------------------------------------------------------------------
- * Port configuration
- */
-#define CONFIG_SYS_FECI2C 0x0FA0
-
#endif /* _M5275EVB_H */
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 69a5df61b141..de5f42b10117 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -100,13 +100,6 @@
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
#endif
-#define CONFIG_SYS_FLASH_BR_PRELIM \
- (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | \
- BR_PS_16 | BR_V)
-#define CONFIG_SYS_FLASH_OR_PRELIM \
- ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \
- | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR)
-
#define CONFIG_FSL_CPLD
#define CPLD_BASE 0xffdf0000 /* CPLD registers */
#ifdef CONFIG_PHYS_64BIT
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 02a5e94c4f48..2dc6bd2f2cdd 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -95,6 +95,4 @@
#define CONFIG_SYS_FLASH_BASE NAND_BASE
#endif
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
-
#endif /* __CONFIG_H */
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index dde30eab5ed9..cd2114541d7c 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -62,9 +62,6 @@
#define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
-#define CONFIG_SYS_CORE_SRAM_SIZE 0x8000
-#define CONFIG_SYS_CORE_SRAM 0x80000000
-
/*
* Define baudrate for UART1 (console output, tftp, ...)
* default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
@@ -209,7 +206,6 @@
/* FLASH organization */
#define CONFIG_SYS_FLASH_SIZE 0x2000000
-#define CONFIG_SYS_FLASH_CFI_NONBLOCK 1
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h
index 789e6a4c9d59..6cb1a1060022 100644
--- a/include/configs/brppt1.h
+++ b/include/configs/brppt1.h
@@ -143,8 +143,4 @@ NANDTGTS \
#define CONFIG_NAND_OMAP_GPMC_WSCFG 1
#endif /* CONFIG_MTD_RAW_NAND */
-#if defined(CONFIG_ENV_IS_IN_NAND)
-#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_ENV_SIZE
-#endif
-
#endif /* ! __CONFIG_BRPPT1_H__ */
diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h
index 965eba58b311..fdbcbf5d96e2 100644
--- a/include/configs/chiliboard.h
+++ b/include/configs/chiliboard.h
@@ -119,10 +119,4 @@
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 14
-#if defined(CONFIG_ENV_IS_IN_NAND)
-#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
-#endif
-
-/* Network. */
-
#endif /* ! __CONFIG_CHILIBOARD_H */
diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h
index 4baf7f7e24ae..84b4271c36fa 100644
--- a/include/configs/cm_t335.h
+++ b/include/configs/cm_t335.h
@@ -79,8 +79,6 @@
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
-
/* GPIO pin + bank to pin ID mapping */
#define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin)
diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h
index c29abd15b39e..ba0662f1f40e 100644
--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@@ -143,13 +143,6 @@ enter a valid image address in flash */
#define CONFIG_SYS_SCR 0x0003
#define CONFIG_SYS_SPR 0xffff
-/* ---
- * Ethernet settings
- * ---
- */
-
-#define CONFIG_SYS_ENET_BD_BASE 0x780000
-
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in internal SRAM)
*/
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 7615696f1608..a4fb2b53dc9f 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -92,12 +92,6 @@
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
#endif
-#define CONFIG_SYS_FLASH_BR_PRELIM \
- (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) \
- | BR_PS_16 | BR_V)
-#define CONFIG_SYS_FLASH_OR_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY &
~OR_GPCM_EHTR) \
- | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR)
-
#define PIXIS_BASE 0xffdf0000 /* PIXIS registers */
#ifdef CONFIG_PHYS_64BIT
#define PIXIS_BASE_PHYS 0xfffdf0000ull
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index f699cb107800..58c902431d13 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -134,7 +134,6 @@
#endif
#ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */
#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
#define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */
#endif
diff --git a/include/configs/etamin.h b/include/configs/etamin.h
index 3acc62d9e178..7923fbb599d1 100644
--- a/include/configs/etamin.h
+++ b/include/configs/etamin.h
@@ -15,7 +15,6 @@
#include "siemens-am33x-common.h"
/* NAND specific changes for etamin due to different page size */
#undef CONFIG_SYS_NAND_ECCPOS
-#undef CONFIG_SYS_ENV_SECT_SIZE
#define CONFIG_SYS_ENV_SECT_SIZE (512 << 10) /* 512 KiB */
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index 1b97e54be7f6..e89b800b7eeb 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -123,17 +123,10 @@
#define CONFIG_SYS_MRAM_BASE 0xE2000000
#define CONFIG_SYS_MRAM_SIZE 0x20000 /* 128 Kb */
-#define CONFIG_SYS_OR_TIMING_MRAM
-
-
/*
* CPLD setup
*/
#define CONFIG_SYS_CPLD_BASE 0xE3000000
-#define CONFIG_SYS_CPLD_SIZE 0x8000
-
-#define CONFIG_SYS_OR_TIMING_MRAM
-
/*
* HW-Watchdog
diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h
index 6becd7cd31a8..20a36fbe115e 100644
--- a/include/configs/km/km-powerpc.h
+++ b/include/configs/km/km-powerpc.h
@@ -9,9 +9,6 @@
/* Do boardspecific init for all boards */
-/* EEprom support 24C08, 24C16, 24C64 */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
-
/* Increase max size of compressed kernel */
/******************************************************************************
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index eee71db37c2b..a91e5e8f8654 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -97,9 +97,6 @@ extern void __set_direction(unsigned pin, int high);
#define I2C_DELAY udelay(1)
#define I2C_SOFT_DECLARATIONS
-/* EEprom support 24C128, 24C256 valid for environment eeprom */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
-
/*
* Environment variables configurations
*/
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index b124ce52620c..48fe8288aa18 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -60,28 +60,6 @@
#define I2C_VOL_MONITOR_BUS_V_OVF 0x1
#define I2C_VOL_MONITOR_BUS_V_SHIFT 3
-/* DSPI */
-#define CONFIG_FSL_DSPI1
-
-#define MMAP_DSPI DSPI1_BASE_ADDR
-
-#define CONFIG_SYS_DSPI_CTAR0 1
-
-#define CONFIG_SYS_DSPI_CTAR1 (DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\
- DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \
- DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \
- DSPI_CTAR_DT(0))
-
-#define CONFIG_SYS_DSPI_CTAR2 (DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\
- DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \
- DSPI_CTAR_CSSCK(0) | DSPI_CTAR_ASC(0) | \
- DSPI_CTAR_DT(0))
-
-#define CONFIG_SYS_DSPI_CTAR3 (DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\
- DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \
- DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \
- DSPI_CTAR_DT(0))
-
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"verify=no\0" \
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index c2ad2afb5eb5..f6efda258c0e 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -208,10 +208,6 @@
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
#endif
-/* Debug Server firmware */
-#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
-#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580D00000ULL
-
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
/*
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 23ddae1dc3d8..c6b601de227a 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -179,10 +179,6 @@
#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
#endif
-
-/* Debug Server firmware */
-#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
-#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580D00000ULL
#endif
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h
index 7bfc04ff18f7..c76e7ea1605a 100644
--- a/include/configs/mx6sabreauto.h
+++ b/include/configs/mx6sabreauto.h
@@ -31,7 +31,6 @@
#ifdef CONFIG_MTD_NOR_FLASH
#define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR
-#define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024)
#endif
#define CONFIG_SYS_FSL_USDHC_NUM 2
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 2cd42e5a1dc4..ad3dbbcac52f 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -26,7 +26,6 @@
10, 11, 12, 13}
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 3
-#define CONFIG_SYS_ENV_SECT_SIZE SZ_128K
/* NAND: SPL falcon mode configs */
#endif /* CONFIG_MTD_RAW_NAND */
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 2683d4c7ea45..c47d5573c46a 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -31,7 +31,6 @@
10, 11, 12, 13}
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 3
-#define CONFIG_SYS_ENV_SECT_SIZE SZ_128K
#endif /* CONFIG_MTD_RAW_NAND */
#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 81c1692055d9..1af87b271c4f 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -152,6 +152,4 @@
#define CONFIG_SYS_FLASH_SIZE 0x4000000
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
-
#endif /* __CONFIG_H */
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index 31e94df84df7..5181792b7b73 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -33,8 +33,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */
-
#define CONFIG_HWCONFIG
#define CONFIG_SYS_INIT_RAM_ADDR 0x00100000
diff --git a/include/configs/s5p4418_nanopi2.h
b/include/configs/s5p4418_nanopi2.h
index 43593572d963..ae94f0ecc56a 100644
--- a/include/configs/s5p4418_nanopi2.h
+++ b/include/configs/s5p4418_nanopi2.h
@@ -18,11 +18,10 @@
/*-----------------------------------------------------------------------
* System memory Configuration
*/
-#define CONFIG_SYS_MEM_SIZE 0x40000000
#define CONFIG_SYS_SDRAM_BASE 0x71000000
/*
- * "(CONFIG_SYS_MEM_SIZE - CONFIG_SYS_RESERVE_MEM_SIZE)" has been used in
+ * "(0x40000000 - CONFIG_SYS_RESERVE_MEM_SIZE)" has been used in
* u-boot nanopi2-v2016.01.
* This is not working anymore because boot_fdt_add_mem_rsv_regions() in
* common/image-fdt.c has been extended:
diff --git a/include/configs/siemens-am33x-common.h
b/include/configs/siemens-am33x-common.h
index d2d4296eed62..fcb0fd5cec3b 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -370,9 +370,6 @@
/* CS0 */
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND
devices */
-#if !defined(CONFIG_SPI_BOOT)
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
-#endif
#endif
#endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */
diff --git a/include/configs/vexpress_common.h
b/include/configs/vexpress_common.h
index d3eb01bae624..7c0856ae325a 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -167,10 +167,7 @@
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0"
/* FLASH and environment organization */
-#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
#define CONFIG_SYS_FLASH_SIZE 0x04000000
-#define CONFIG_SYS_FLASH_BASE0 V2M_NOR0
-#define CONFIG_SYS_FLASH_BASE1 V2M_NOR1
/* Timeout values in ticks */
@@ -183,7 +180,6 @@
*/
/* Store environment at top of flash */
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE0, \
- CONFIG_SYS_FLASH_BASE1 }
+#define CONFIG_SYS_FLASH_BANKS_LIST { V2M_NOR0, V2M_NOR1 }
#endif /* VEXPRESS_COMMON_H */
diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h
index 526165cf1028..ad8ea6538c20 100644
--- a/include/configs/xtfpga.h
+++ b/include/configs/xtfpga.h
@@ -76,13 +76,12 @@
#if defined(CONFIG_MAX_MEM_MAPPED) && \
CONFIG_MAX_MEM_MAPPED < CONFIG_SYS_SDRAM_SIZE
-#define CONFIG_SYS_MEMORY_SIZE CONFIG_MAX_MEM_MAPPED
+#define XTENSA_SYS_TEXT_ADDR \
+ (MEMADDR(CONFIG_MAX_MEM_MAPPED) - CONFIG_SYS_MONITOR_LEN)
#else
-#define CONFIG_SYS_MEMORY_SIZE CONFIG_SYS_SDRAM_SIZE
-#endif
-
#define XTENSA_SYS_TEXT_ADDR \
- (MEMADDR(CONFIG_SYS_MEMORY_SIZE) - CONFIG_SYS_MONITOR_LEN)
+ (MEMADDR(CONFIG_SYS_SDRAM_SIZE) - CONFIG_SYS_MONITOR_LEN)
+#endif
/*==============================*/
/* U-Boot general configuration */
@@ -105,18 +104,6 @@
* SHIFT left amount and field WIDTH (bits), and also by a bitMASK.
*/
-/* Date of FPGA bitstream build in binary coded decimal (BCD) */
-#define CONFIG_SYS_FPGAREG_DATE IOADDR(0x0D020000)
-#define FPGAREG_MTH_SHIFT 24 /* BCD month 1..12 */
-#define FPGAREG_MTH_WIDTH 8
-#define FPGAREG_MTH_MASK 0xFF000000
-#define FPGAREG_DAY_SHIFT 16 /* BCD day 1..31 */
-#define FPGAREG_DAY_WIDTH 8
-#define FPGAREG_DAY_MASK 0x00FF0000
-#define FPGAREG_YEAR_SHIFT 0 /* BCD year 2001..9999*/
-#define FPGAREG_YEAR_WIDTH 16
-#define FPGAREG_YEAR_MASK 0x0000FFFF
-
/* FPGA core clock frequency in Hz (also input to UART) */
#define CONFIG_SYS_FPGAREG_FREQ IOADDR(0x0D020004) /* CPU clock
frequency*/
@@ -166,17 +153,14 @@
#ifdef CONFIG_XTFPGA_LX60
# define CONFIG_SYS_FLASH_SIZE 0x0040000 /* 4MB */
-# define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* block size 64KB */
# define CONFIG_SYS_FLASH_PARMSECT_SZ 0x2000 /* param size 8KB */
# define CONFIG_SYS_FLASH_BASE IOADDR(0x08000000)
#elif defined(CONFIG_XTFPGA_KC705)
# define CONFIG_SYS_FLASH_SIZE 0x8000000 /* 128MB */
-# define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */
# define CONFIG_SYS_FLASH_PARMSECT_SZ 0x8000 /* param size 32KB */
# define CONFIG_SYS_FLASH_BASE IOADDR(0x00000000)
#else
# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* 16MB */
-# define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */
# define CONFIG_SYS_FLASH_PARMSECT_SZ 0x8000 /* param size 32KB */
# define CONFIG_SYS_FLASH_BASE IOADDR(0x08000000)
#endif
--
2.25.1
