Re: [PATCH 2/2] clk: sunxi: add and use dummy gate clocks

2022-05-24 Thread Andre Przywara
On Fri, 6 May 2022 01:33:01 +0100 Andre Przywara wrote: > Some devices enumerate various clocks in their DT, and many drivers > just blanketly try to enable all of them. This creates problems > since we only model a few gate clocks, and the clock driver outputs > a warning when a clock is not de

Re: [PATCH 2/2] clk: sunxi: add and use dummy gate clocks

2022-05-08 Thread Samuel Holland
On 5/5/22 7:33 PM, Andre Przywara wrote: > Some devices enumerate various clocks in their DT, and many drivers > just blanketly try to enable all of them. This creates problems > since we only model a few gate clocks, and the clock driver outputs > a warning when a clock is not described: > ===

[PATCH 2/2] clk: sunxi: add and use dummy gate clocks

2022-05-05 Thread Andre Przywara
Some devices enumerate various clocks in their DT, and many drivers just blanketly try to enable all of them. This creates problems since we only model a few gate clocks, and the clock driver outputs a warning when a clock is not described: = sunxi_set_gate: (CLK#3) unhandled = Som