[PATCH 3/3] dm: am33xx: drop GPIO domain clock enabling by SOC api

[Dario Binacchi]

Enabling the domain clock is performed by the sysc interconnect target
module driver during the GPIO device probing.

Signed-off-by: Dario Binacchi <dario...@libero.it>

---

 arch/arm/mach-omap2/am33xx/clock_am33xx.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-omap2/am33xx/clock_am33xx.c 
b/arch/arm/mach-omap2/am33xx/clock_am33xx.c
index cf71192360..ba2279780d 100644
--- a/arch/arm/mach-omap2/am33xx/clock_am33xx.c
+++ b/arch/arm/mach-omap2/am33xx/clock_am33xx.c
@@ -208,7 +208,9 @@ void enable_basic_clocks(void)
                &cmwkup->wkl4wkclkctrl,
                &cmper->l3instrclkctrl,
                &cmper->l4hsclkctrl,
+#if !CONFIG_IS_ENABLED(DM_GPIO)
                &cmwkup->wkgpio0clkctrl,
+#endif
                &cmwkup->wkctrlclkctrl,
                &cmper->timer2clkctrl,
                &cmper->gpmcclkctrl,
@@ -216,9 +218,11 @@ void enable_basic_clocks(void)
                &cmper->mmc0clkctrl,
                &cmper->mmc1clkctrl,
                &cmwkup->wkup_i2c0ctrl,
+#if !CONFIG_IS_ENABLED(DM_GPIO)
                &cmper->gpio1clkctrl,
                &cmper->gpio2clkctrl,
                &cmper->gpio3clkctrl,
+#endif
                &cmper->i2c1clkctrl,
                &cmper->cpgmac0clkctrl,
                &cmper->spi0clkctrl,
-- 
2.17.1