On Saturday 23 January 2021 22:23:10 Lukasz Majewski wrote:
> Hi Pali,
>
> > On Saturday 23 January 2021 16:16:11 Lukasz Majewski wrote:
> > > Hi Pali,
> > >
> > > > Interrupt for EP0 is indicated in intrtx register via first bit.
> > > > It is set for both RX and TX. First bit in intrrx
Hi Pali,
> On Saturday 23 January 2021 16:16:11 Lukasz Majewski wrote:
> > Hi Pali,
> >
> > > Interrupt for EP0 is indicated in intrtx register via first bit.
> > > It is set for both RX and TX. First bit in intrrx register is
> > > reserved and not set.
> > >
> > > So remove calling
On Saturday 23 January 2021 16:16:11 Lukasz Majewski wrote:
> Hi Pali,
>
> > Interrupt for EP0 is indicated in intrtx register via first bit. It
> > is set for both RX and TX. First bit in intrrx register is reserved
> > and not set.
> >
> > So remove calling musb_peri_ep0() function at every
Hi Pali,
> Interrupt for EP0 is indicated in intrtx register via first bit. It
> is set for both RX and TX. First bit in intrrx register is reserved
> and not set.
>
> So remove calling musb_peri_ep0() function at every iteration of
> udc_irq() and musb_peri_rx() and call it only from
Interrupt for EP0 is indicated in intrtx register via first bit. It is set
for both RX and TX. First bit in intrrx register is reserved and not set.
So remove calling musb_peri_ep0() function at every iteration of udc_irq()
and musb_peri_rx() and call it only from musb_peri_tx() when correct
5 matches
Mail list logo