Re: [PATCH 4/9] net: dwc_eth_qos: Set DMA_MODE SWR bit to reset the MAC

On Thu, Jan 19, 2023 at 11:45 PM Marek Vasut wrote: > > The driver currently only waits for DMA_MODE SWR bit to clear itself. > This is insufficient e.g. on i.MX8M Plus, where the MAC must be reset > before IOMUX GPR[1] content is latched into the MAC and used. Without > the proper reset, the

[PATCH 4/9] net: dwc_eth_qos: Set DMA_MODE SWR bit to reset the MAC

The driver currently only waits for DMA_MODE SWR bit to clear itself. This is insufficient e.g. on i.MX8M Plus, where the MAC must be reset before IOMUX GPR[1] content is latched into the MAC and used. Without the proper reset, the i.MX8M Plus MAC variant does not take the value in IOMUX GPR[1]