Hi Mark,
On Sat, 22 Jan 2022 at 10:41, Mark Kettenis wrote:
>
> > From: Simon Glass
> > Date: Sat, 22 Jan 2022 10:17:08 -0700
> >
> > Hi Mark,
> >
> > On Sat, 22 Jan 2022 at 07:45, Mark Kettenis wrote:
> > >
> > > > From: Simon Glass
> > > > Date: Fri, 21 Jan 2022 18:40:24 -0700
> > > >
> > >
> From: Simon Glass
> Date: Sat, 22 Jan 2022 10:17:08 -0700
>
> Hi Mark,
>
> On Sat, 22 Jan 2022 at 07:45, Mark Kettenis wrote:
> >
> > > From: Simon Glass
> > > Date: Fri, 21 Jan 2022 18:40:24 -0700
> > >
> > > Hi Mark,
> > >
> > > On Fri, 14 Jan 2022 at 04:05, Mark Kettenis wrote:
> > > >
>
Hi Mark,
On Sat, 22 Jan 2022 at 07:45, Mark Kettenis wrote:
>
> > From: Simon Glass
> > Date: Fri, 21 Jan 2022 18:40:24 -0700
> >
> > Hi Mark,
> >
> > On Fri, 14 Jan 2022 at 04:05, Mark Kettenis wrote:
> > >
> > > Add a driver for the NVMe storage controller integrated on
> > > Apple SoCs. Thi
> From: Simon Glass
> Date: Fri, 21 Jan 2022 18:40:24 -0700
>
> Hi Mark,
>
> On Fri, 14 Jan 2022 at 04:05, Mark Kettenis wrote:
> >
> > Add a driver for the NVMe storage controller integrated on
> > Apple SoCs. This NVMe controller isn't PCI based and deviates
> > from the NVMe standard in its
Hi Mark,
On Fri, 14 Jan 2022 at 04:05, Mark Kettenis wrote:
>
> Add a driver for the NVMe storage controller integrated on
> Apple SoCs. This NVMe controller isn't PCI based and deviates
> from the NVMe standard in its implementation of the command
> submission queue and the integration of an NV
Add a driver for the NVMe storage controller integrated on
Apple SoCs. This NVMe controller isn't PCI based and deviates
from the NVMe standard in its implementation of the command
submission queue and the integration of an NVMMU that needs
to be managed. This commit tweaks the core NVMe code to
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