Re: [PATCH u-boot-marvell 5/9] arm: mvebu: a38x: serdes: Don't set PCIe Common Clock Configuration

On 24.09.21 22:59, Marek Behún wrote: From: Pali Rohár Enabling Common Clock Configuration bit in PCIe Root Port Link Control Register should not be done unconditionally. It is enabled by operating system as part of ASPM. Also after enabling Common Clock Configuration it is required to do more

[PATCH u-boot-marvell 5/9] arm: mvebu: a38x: serdes: Don't set PCIe Common Clock Configuration

From: Pali Rohár Enabling Common Clock Configuration bit in PCIe Root Port Link Control Register should not be done unconditionally. It is enabled by operating system as part of ASPM. Also after enabling Common Clock Configuration it is required to do more work, like retraining link. Some cards