On 08.04.20 19:25, Marek Behún wrote:
In case when ARM Trusted Firmware changes the default address of PCIe
regions (which can be done for devices with 4 GB RAM to maximize the
amount of RAM the device can use) we add code that looks at how ATF
changed the PCIe windows in the CPU Address Decoder
Hi Stefan,
sorry I overlooked the other two things you commented on the code.
On Thu, 9 Apr 2020 10:09:52 +0200
Stefan Roese wrote:
> > + return -1;
>
> return -ENOENT; ?
The function returns u32. The error is reported by returning (u32)-1.
The check base < 0 won't work. I would spe
> > +}
> > +
> > +int a3700_fdt_fix_pcie_regions(void *blob)
> > +{
> > + u32 new_ranges[14], base;
>
> Where does this "14" come from? Is this a safe upper margin?
Yes, the way how the code below works, it won't overflow or anything.
I even test whether the "ranges" property from the dtc has
On 08.04.20 19:25, Marek Behún wrote:
In case when ARM Trusted Firmware changes the default address of PCIe
regions (which can be done for devices with 4 GB RAM to maximize the
amount of RAM the device can use) we add code that looks at how ATF
changed the PCIe windows in the CPU Address Decoder
In case when ARM Trusted Firmware changes the default address of PCIe
regions (which can be done for devices with 4 GB RAM to maximize the
amount of RAM the device can use) we add code that looks at how ATF
changed the PCIe windows in the CPU Address Decoder and changes given
device-tree blob accor
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