Re: [PATCH v2] ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM

2023-08-16 Thread Patrice CHOTARD
On 7/27/23 01:58, Marek Vasut wrote: > The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC > block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK > pad for the PHY and the same 50 MHz clock are fed back to ETHRX via > internal eth_clk_fb clock connection OR (2) ET

Re: [PATCH v2] ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM

2023-08-06 Thread Patrice CHOTARD
On 7/27/23 01:58, Marek Vasut wrote: > The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC > block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK > pad for the PHY and the same 50 MHz clock are fed back to ETHRX via > internal eth_clk_fb clock connection OR (2) ET

Re: [PATCH v2] ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM

2023-08-04 Thread Patrice CHOTARD
On 7/27/23 01:58, Marek Vasut wrote: > The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC > block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK > pad for the PHY and the same 50 MHz clock are fed back to ETHRX via > internal eth_clk_fb clock connection OR (2) ET

[PATCH v2] ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM

2023-07-26 Thread Marek Vasut
The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK pad for the PHY and the same 50 MHz clock are fed back to ETHRX via internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at all, MCO2 generates 50 MHz