When booting from coreboot we may not have a PCH driver available. The
SPI driver can operate without the PCH but currently complains in this
case. Update it to continue to work normally. The only missing feature
is memory-mapping of SPI-flash contents, which is not essential.

Signed-off-by: Simon Glass <s...@chromium.org>

Reviewed-by: Bin Meng <bmeng...@gmail.com>
---

(no changes since v1)

 drivers/spi/ich.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 1cd410493b0..3d49c22a9da 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -114,7 +114,7 @@ static bool ich9_can_do_33mhz(struct udevice *dev)
        struct ich_spi_priv *priv = dev_get_priv(dev);
        u32 fdod, speed;
 
-       if (!CONFIG_IS_ENABLED(PCI))
+       if (!CONFIG_IS_ENABLED(PCI) || !priv->pch)
                return false;
        /* Observe SPI Descriptor Component Section 0 */
        dm_pci_write_config32(priv->pch, 0xb0, 0x1000);
@@ -632,7 +632,7 @@ static int ich_spi_get_basics(struct udevice *bus, bool 
can_probe,
                if (device_get_uclass_id(pch) != UCLASS_PCH) {
                        uclass_first_device(UCLASS_PCH, &pch);
                        if (!pch)
-                               return log_msg_ret("uclass", -EPROTOTYPE);
+                               ; /* ignore this error since we don't need it */
                }
        }
 
-- 
2.31.1.498.g6c1eba8ee3d-goog

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