On Mon, 17 Aug 2020 at 01:08, Stefan Roese wrote:
>
> From: Suneel Garapati
>
> Enable PCI memory regions in ranges property to be of multiple entry.
> This helps to add support for SoC's like OcteonTX/TX2 where every
> peripheral is on PCI bus.
>
> Signed-off-by: Suneel Garapati
> Cc: Simon
From: Suneel Garapati
Enable PCI memory regions in ranges property to be of multiple entry.
This helps to add support for SoC's like OcteonTX/TX2 where every
peripheral is on PCI bus.
Signed-off-by: Suneel Garapati
Cc: Simon Glass
Cc: Bin Meng
Signed-off-by: Stefan Roese
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