On 10/9/23 18:46, Paul Barker wrote:
On the Renesas RZ/G2L SoC family, we must ensure that the required clock
signals are enabled and the reset signal is de-asserted before we try to
communicate with the SDHI module.
Signed-off-by: Paul Barker
Reviewed-by: Biju Das
Reviewed-by: Lad Prabhakar
On the Renesas RZ/G2L SoC family, we must ensure that the required clock
signals are enabled and the reset signal is de-asserted before we try to
communicate with the SDHI module.
Signed-off-by: Paul Barker
Reviewed-by: Biju Das
Reviewed-by: Lad Prabhakar
---
v1->v2:
* Move RZ/G2L specific se
2 matches
Mail list logo