Hi
On Tue, May 30, 2023 at 3:49 PM Francesco Dolcini wrote:
>
> On Tue, May 30, 2023 at 03:42:18PM +0200, Michael Nazzareno Trimarchi wrote:
> > On Tue, May 30, 2023 at 3:34 PM Francesco Dolcini
> > wrote:
> > >
> > > From: Emanuele Ghidoli
> > >
> > > Ensure that every write is flushed to mem
On Tue, May 30, 2023 at 03:42:18PM +0200, Michael Nazzareno Trimarchi wrote:
> On Tue, May 30, 2023 at 3:34 PM Francesco Dolcini
> wrote:
> >
> > From: Emanuele Ghidoli
> >
> > Ensure that every write is flushed to memory and afterward reads are
> > from memory.
> > Since the algorithm rely on t
Hi
Few questions
On Tue, May 30, 2023 at 3:34 PM Francesco Dolcini wrote:
>
> From: Emanuele Ghidoli
>
> Ensure that every write is flushed to memory and afterward reads are
> from memory.
> Since the algorithm rely on the fact that accessing to not existent
> memory lead to write at addr / 2 w
From: Emanuele Ghidoli
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses
to aliased (not physically present) addresses are cached
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