From: Vikhyat Goyal <vikhyat.go...@xilinx.com> Added dt binding for seps525 display driver.
Signed-off-by: Vikhyat Goyal <vikhyat.go...@xilinx.com> Signed-off-by: Michal Simek <michal.si...@xilinx.com> Reviewed-by: Simon Glass <s...@chromium.org> --- (no changes since v1) MAINTAINERS | 1 + .../video/syncoam,seps525.txt | 24 +++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 doc/device-tree-bindings/video/syncoam,seps525.txt diff --git a/MAINTAINERS b/MAINTAINERS index 127e30c0a5e0..11857ece9a53 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -547,6 +547,7 @@ S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git F: arch/arm/mach-zynq/ F: doc/board/xilinx/ +F: doc/device-tree-bindings/video/syncoam,seps525.txt F: drivers/clk/clk_zynq.c F: drivers/fpga/zynqpl.c F: drivers/gpio/zynq_gpio.c diff --git a/doc/device-tree-bindings/video/syncoam,seps525.txt b/doc/device-tree-bindings/video/syncoam,seps525.txt new file mode 100644 index 000000000000..e1e0db9d71fb --- /dev/null +++ b/doc/device-tree-bindings/video/syncoam,seps525.txt @@ -0,0 +1,24 @@ +spi based seps525 framebuffer display driver + +Driver for seps525 display controller (in spi mode), This binding supports selection +of spi chipselect, spi max frequency, gpio to drive dc and reset pin of seps525 +controller and spi transaction bit length. + +Required properties: +- compatible: "syncoam,seps525" +- reg: Specifies the chip-select the seps525 is connected to on the spi bus +- reset-gpios: gpio connected to reset pin of seps525 controller. +- dc-gpios: gpio connected to dc pin of seps525 controller: +- buswidth: bitlength of each spi transaction + +Example: + displayspi@0 { + compatible = "syncoam,seps525"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-cpol; + spi-cpha; + buswidth = <8>; + reset-gpios = <&gpio 0x1c GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio 0x1b GPIO_ACTIVE_HIGH>; + }; -- 2.29.2
